speech synthesizer. Scheme, description

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ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING
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speech synthesizer. Encyclopedia of radio electronics and electrical engineering

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Encyclopedia of radio electronics and electrical engineering / Digital technology

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The speaking device (speech synthesizer) is used to reproduce human speech in various electronic and household devices (telephone answering machines, door locks, various toys). In the proposed device, in contrast to the known ones, a new method of signal generation is applied.

The device consists of a clock pulse generator, the output of which is connected to the input of the address generation device and the input of the control unit. The outputs of the address generator form an address bus. They are connected to the address inputs of the ROM, the outputs of which, forming a data bus, are connected to the data inputs of the parallel-to-serial converter. The output of the control unit is connected to the control input of the code conversion device. The output of the latter is connected to an output signal level shaping device, at the output of which a filter, an amplifier and a loudspeaker (reproducing device) are connected in series.

The device works as follows. After switching on, all counters included in the device are reset to zero. The address generator generates address zero on the address bus. At the signal of the control unit, the contents of the zero cell of the ROM are rewritten to the code conversion device. Information about the value of the eighth bit is sent to the level forming device. The pulses of the clock generator through the control unit act on the code converter, the output of which receives the 7th, 6th, etc., respectively. bits of the null byte. The level shaper generates an output signal in accordance with a given program. Upon receipt of eight pulses, the information stored in the zero cell of the ROM will be exhausted. The ninth pulse generates a new address and a signal for writing the output ROM code to the code conversion device from the control unit. Further, the whole process is repeated cyclically until all the information stored in the ROM is processed. The filter at the output of the conditioning device smoothes the signal by removing the high frequency components generated by the stepwise conditioning of the signal, the amplifier amplifies, and the loudspeaker reproduces the signal.

The schematic diagram of the device is shown in the figure.

(click to enlarge)

The clock pulse generator is assembled on three inverters of the D 1 chip, resistors R3, R4 and capacitor C2. Resistor R4 and capacitor C2 determine the frequency of the generated pulses. Resistor R3 is needed to limit the current through the input diodes of the D1 chip and reduce the load on the D1.2 element. The address generation device is assembled on D2.D3.D11.D12 microcircuits.

The control unit can be divided into three functional units. The first serves for the initial and repeated runs of the circuit. It is assembled on a diode VD2, resistors R1, R2, capacitor C1 and key SA1. The second functional unit controls the recording of information from ROM to the shift register and is assembled on D4.1, D 1.6 microcircuits, VD1 diode, capacitor C3 and resistor R5. The third node stops the circuit at the end of the speech fragment. It is assembled on a D5 chip.

The parallel to serial converter is assembled on shift registers D7,D8.

The output signal level shaper is assembled on a D9.1 chip, a resistor R6, capacitors C4, C5 and a field effect transistor VT1, connected according to the source follower circuit. Capacitors Sat, C9, C10 are separating to exclude connections between cascades in direct current.

The filter is assembled on a resistor R8 and a capacitor C7. The amplifier consists of two amplification stages, assembled on transistors VT2, VT3, connected according to a common emitter circuit. Resistors R9, R10,

R11, R12 determine the mode of operation of transistors for direct current. The load of the amplifier is the loudspeaker Rn.

The scheme allows the use of up to ten ROM chips for storing voice messages. The higher the clock frequency of the master oscillator, the higher the quality of speech reproduction, but the more memory is required.

The tables show the codes of the voice message: "I, the Siberian Santa Claus, have brought you gifts!" for a clock frequency of 12 kHz.

Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9

Author: M. Loshkarev, Altai Territory, Pervomaisky district, Sibirsky village; Publication: N. Bolshakov, rf.atnn.ru

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MAX14001 - universal isolated discrete input 28.02.2017

In automation systems, discrete (binary signals) coming from buttons, switches, sensors, actuators, etc. are very common. There are several types of digital inputs and several different standards that have requirements for them.

The traditional discrete signal receiver solution is built very simply, without the use of complex components and circuit solutions. However, each requirement requires its own specification, and sometimes the circuitry of the discrete input channel. In addition, traditional solutions do not allow for additional processing of the input signal to improve noise immunity.

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Maxim Integrated has released the MAX14001 and MAX14002, the unique ICs - System-on-a-Chip for Universal Discrete Inputs, which allow you to implement an intelligent discrete input with individual (per channel) galvanic isolation using a single chip.

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