Digital frequency synthesizers 1508PL11, 1508PL11A, 1508PL12. Reference data

Encyclopedia of radio electronics and electrical engineering / Reference materials

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Microcircuits are the basis for building frequency synthesizers with phase-locked loops. The devices are manufactured using CMOS technology. Synthesizers differ from one another by the limits of the input frequency and the maximum division factor.

Made in glass-to-metal housing 4105.14-5 (401.14-5.07) with hard tinned leads (Fig. 1). Weight of the device - no more than 0,6 g.

Close functional analogues of microcircuits 1508PL11, 1508PL11A and 1508PL12, but inferior to them in terms of characteristics, are NJ88C30, NJ8840 devices from PLESSEY, as well as 1508PL1 IK1508PL1 manufactured by the Mikron plant.

The pinout of the synthesizers is the same (see Table 1).

Main technical characteristics*

• Current consumption for 1508PL11, mA, no more, at a VCO frequency of 200 MHz, a reference frequency of 10 MHz and a supply voltage of 5,5 V ...... 7
• typical value......5,5
• 4 V......6
• typical value......3
• Current consumption for 1508PL11A and 1508PL12, mA, no more, at VCO frequency 500 MHz, reference frequency 12 MHz and supply voltage 5,5 V......15
• typical value......10
• 3,5 V......7,5
• typical value......5
• VCO input sensitivity, V (rms), not worse, at a supply voltage of 4,5 V for 1508PL11 (at a VCO frequency of 200 MHz) and 1508PL11AI 1508PL12 (550 MHz)...... 0,5
• The maximum signal frequency at the VCO input. MHz, for 1508PL11 (at an ambient temperature of -50 ... +80 ° С) ...... 200
• 1508ПЛ11А, 1508ПЛ12 (-60...+85°С)......550
• Frequency of the exemplary quartz oscillator, MHz, not more than......15
• typical value......10
• The maximum frequency of the signal at the input X, from an external reference generator, MHz, at a voltage of this signal of 1 V (rms) for 1508PL11 (at an ambient temperature of -50...+85°C)......>50
• 1508ПЛ11А, 1508ПЛ12 (-60...+85°С)......>100
• Voltage at the inputs DATA, DTi, Сl, V, high level, not less than ...... Upit -1
• low, no more ...... 1
• The duration of the rise and fall of pulses at the inputs DATA, DTi, Cl, no, no more ...... 200
• Information setting time at the DATA input, ns, not less than......200
• Pulse frequency at the input Сl, MHz, not more, for 1508PL11......2
• 1508ПЛ11А. 1508ПЛ12......4
• Pulse duration at input DT„ not, not less than, for 1508PL11......500
• 1508ПЛ11А, 1508ПЛ12 .....250
• Output sinking current, mA, not less, at an output voltage of 0,5 V outputs DCo,PDo......0,8
• SC, LD, DPO......1.6
• Output current, mA, not less, at output voltage Upit-0,5 V of output PUo......0.8
• The frequency division factor for 1508PL11 and 1508PL11A in the main channel (from the VCO input) is minimal ...... 240
• maximum......65535
• exemplary (from input X) minimum......100
• maximum......2000
• The frequency division factor for 1508PL12 in the main channel (from the VCO input) is minimal ...... 240
• maximum......131071
• exemplary (from input X) minimum......100
• maximum......2000

*At ambient temperature 25°C and supply voltage 5±0,5 V, unless otherwise specified.

A simplified functional diagram of the 1508PL11 (1508PL11A) synthesizer is shown in fig. 2, and a typical switching circuit - in fig. 3.

According to the functional diagram, the synthesizer 1508PL12 does not differ from 1508PL11, only the programmable frequency divider of the main channel UZ5 and the register DD2 are not twelve, but thirteen bits, and the shift register DD4 is not nineteen, but twenty bits.

The division factor N2 of the programmable frequency divider of the main channel can take any integer values ​​from 240 to 65535 in increments of 1 for 1508PL11 and 1508PL11A synthesizers (up to 131071 - for 1508PL12). The content of the control code for synthesizers 1508PL11 and 1508PL11A is shown in Table. 2 (upper row - numbers of digits, middle - their designation, bottom - frequency division coefficients of the exemplary channel N1 and main N2, respectively). The coefficient N2 is numerically equal to sixteen digits of the code from DF0 to DF15 in binary representation. For example, 00000000111100002 = 24010 or 11111111111111112 = 6553510.

(click to enlarge)

The division factor N1 of the frequency divider of the exemplary channel is recorded in bits 19 - 17 according to table. 3.

(click to enlarge)

For the 1508PL12 synthesizer, the contents of the control code are presented in Table. four.

(click to enlarge)

Here N2 = 000000000111100002 = 24010. The division factor N1 is written in bits 20-18 in accordance with the same table. 3.

Loading the code into the synthesizer begins with the DR2 bit and ends with the DF0 bit. The introduction of each bit is accompanied by a clock pulse at the Cl input (Fig. 4, corresponding to the 1508PL12 synthesizer). The introduction of the code is completed with a pulse DTi, after which the synthesizer starts dividing the frequency in accordance with the entered coefficients on the main and exemplary channels.

Author: A.Nefedov, Moscow

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