Charger for galvanic cells. Scheme, description

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Charger for galvanic cells. Encyclopedia of radio electronics and electrical engineering

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Encyclopedia of radio electronics and electrical engineering / Chargers, batteries, galvanic cells

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Consider the possibility of multiple use of galvanic cells and batteries. As is known, charging with asymmetric current gives the greatest effect at a ratio of charging and discharging currents of 10:1.

The charger circuit is shown in fig. 115. The pulse generator with adjustable duty cycle is made on the logic elements DD1.1-DD1.3. The pulse repetition rate is about 100 Hz. On transistors VT1 and VT2, a key is assembled that amplifies the current pulses of the generator. If the output of the logic element DD1.3 is low, the transistors VT1, VT2 are open, and a charging current flows through the battery connected to the XS1 sockets. When the voltage is high at the output of the element DD1.3, both transistors are closed and the battery GB1 is discharged through the resistor R7. Variable resistor R1 changes within small limits the ratio of the durations of the open and closed states of the transistor VT2, i.e., the duty cycle of the asymmetric current pulses.

The K561LN2 chip can be replaced with K561LA7, K176LA7; transistor VT1 - any of the KT203, KT361, KT501, VT2 series - any of the KT815, KT817, KT3117, KT608 series. Diodes VD1, VD2 - D311, KD503, KD509, D223 with any letters.

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Setting up the device consists of selecting resistors R6 and R7 according to the required values of charging and discharging currents. The supply voltage is selected within 6...15 V in accordance with the total voltage of the charged elements. The charging current is selected based on the (6...10) hour charge mode. The duty cycle of the current pulses is selected experimentally, depending on the type of elements being charged.

Publication: cxem.net

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