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ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING Formation of a phase shift of a periodic signal. Encyclopedia of radio electronics and electrical engineering
Encyclopedia of radio electronics and electrical engineering / Radio amateur designer Sometimes, when designing radio electronic devices, it becomes necessary to generate time and phase shifts of pulsed periodic signals. Time shift is quite easy to obtain (using a waiting multivibrator, a differentiating circuit, or a delay line). The situation is more complicated with the phase shift, since in this case the delay time is an inverse function of the input frequency. The author of the article talks about the difficulties that arise here, ways to overcome them, gives practical examples of using the results of his work. To form a phase shift, the digital method is most often used, but it has such disadvantages as the complexity of switching, the use of an auxiliary generator, the adjustment steps, and a large number of required electronic elements [1]. Other methods of forming a phase shift are not sufficiently covered in amateur radio literature. Often, instead of a phase delay, a time delay with frequency correction is used, and this leads to a significant non-linearity of the phase response or to a narrowing of the operating frequency band of devices. Meanwhile, analog-to-digital circuitry allows simple means to obtain acceptable phase shift parameters in a wide frequency range. The phase unit brought to the attention of readers (Fig. 1, a) is made on a D- or RS-trigger and does not require the use of auxiliary generators. It removes the main problems of obtaining a phase shift relative to one of the pulse sequence drops in a wide frequency range. For positive differences, the inputs C or R of the trigger DD1 can be used independently (by applying a signal of any duty cycle to the input C, and short pulses to the input R through a differentiating circuit). If you invert the input signal, you can implement a phase shift for negative drops.
On the positive difference at the input C or R trigger DD1 switches to the zero state and the integrating capacitor C2 begins to linearly charged through the inverse output of the trigger from the current generator G1. As soon as the voltage at input S reaches the threshold (for CMOS logic, the threshold voltage Uthr is approximately equal to Upit / 2), the trigger switches to a single state and until the next positive drop arrives, the capacitor C2 will be discharged through the inverse trigger output from the current generator G2. The depth of discharge, and hence the time of subsequent charging, which determines the duration of the output pulse, is directly proportional to the current I2 and inversely proportional to the frequency. From the similarity of the recharging curves of the capacitor C2 (graph UC2 in Fig. 1,b), it can be seen that the shift of the output pulses Uout, expressed in angular units (phase), does not depend on the input frequency, but on the ratio of the current values I1 and I2. The output phase can be regulated by changing the current of one of the generators, ensuring the fulfillment of the condition I1>I2. In this case, the minimum angle will always be greater than zero, since the capacitor C2 cannot be charged instantly, and the maximum angle is somewhat less than 180 degrees. (near this value, the node goes into oscillatory mode). The specified phase shift is stable within the operating frequency interval, and with a sharp change in frequency, it is restored after a short transient process. As the frequency of the input signal increases, the amplitude of the variable component on the capacitor C2 decreases and, starting from a certain moment, the trigger will stop switching at the input S, which is a limiting factor. The use of the integral timer KR1006VI1, which has sensitive input comparators at the inputs of the internal trigger, expands the frequency interval by more than ten times and makes it possible in most cases to replace current generators with resistors, by changing the resistance of which it is possible to control the phase shift generated by the device (Fig. 2).
The main parameters of this node are as follows: the limits of smooth phase control -
frequency interval - the limits of the input frequency change, at which the specified phase remains unchanged, - more than ten octaves or three decades, the lower frequency is inversely proportional to the capacitance of the capacitor C2 and can reach tenths and hundredths of a hertz, the upper frequency - up to hundreds of kilohertz, as for conventional relaxers. To select the ratio of resistor ratings for a given phase shift (see Fig. 1), you can use the formula:
where K=Upit/Uthr (for CMOS logic K=2), and to determine the phase shift from the known ratio of the resistance value of the resistors and the threshold voltage of the input S of the trigger - the formula:
The lower input frequency is approximately estimated from the expression:
The calculation of the phase node on the timer KR1006VI1 has some differences due to the fact that the capacitor C2 is charged through series-connected resistors R2 and R3, discharged through the resistor R2, and the input S is inverting here. The graph of the voltage on the capacitor in this case will be inverse compared to the graph of UC2 in Fig. 1b. Therefore, the value of the threshold voltage must be measured not from the common wire, but from the supply voltage. In the case under consideration Upor=2Upit/3, i.e. K=1,5. For this case, formula (2) will look like:
The resistance of the resistor R2 in most cases can be taken equal to 100 kOhm. If the angle needs to be measured in degrees, then in all formulas the number pi is replaced by 180 degrees. The use of the described phase assembly (Fig. 2) makes it possible to create devices with minimal cost that are difficult to implement in other ways. So, for example, in Fig. 3a shows a diagram of a frequency doubler for an arbitrary duty cycle signal that provides a meander-shaped signal at the output. In the doubler, first there is a sequential phase shift up to 270 degrees. nodes A1-A3, after which the intermediate signals are summed modulo 2 element D1 EXCLUSIVE OR. The use of the EXCLUSIVE OR element here is optional. The more common NAND element is quite sufficient. The signal diagrams remain the same. Graphs in fig. 3b illustrate the operation of the device. A similar device, built on standby multivibrators [2], provides a similar result for only one frequency, changing which requires adjustment of the element ratings.
To form a three-phase voltage, a unit is usually used, consisting of a square-wave generator for a triple frequency and a frequency divider by 3, which provides the appropriate phase shift at the outputs. In some cases, it is more convenient to obtain a three-phase voltage by multiplying the frequency using two phase-shifting nodes A1, A2 (Fig. 4), giving a delay of 120 degrees.
The third cycle forms the logic element D1. The distributor can be used to power three-phase variable speed motors or to control a three-channel multiplexer when switching signals. The shape of the output pulses is shown in fig. 4b. Another example is an ignition timing regulator for a car engine equipped with a contact transistor ignition system. Such a regulator allows you to correct the operation of the engine sparking system when changing its operating mode directly from the cab [3]. The proposed device (Fig. 5, a) consists of a direct channel for transmitting impulses from the contacts S1 of the interrupter to the ignition system and delaying the impulses at a given angle using a phase unit. After adding the pulse sequences on the logic element D1 And we get an output signal characterized by an adjustable moment of spark formation and an almost constant duration of energy accumulation in the primary winding of the ignition coil.
Literature
Author: S. Vychukzhanin, St. Petersburg
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