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ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING Variable frequency electric drive. Encyclopedia of radio electronics and electrical engineering
Encyclopedia of radio electronics and electrical engineering / Electric motors The functional diagram of the simplest version of the variable frequency drive is shown in Fig.1.
In it, to power a 3-phase electric motor, rectangular pulses are used, phase-shifted from each other, as shown in Fig. 2.
The main element of the circuit in Fig. 1 is a generator with a wide range of clock frequency tuning. These pulses are fed to a 6-phase signal generator (three direct phase signals and three inverse ones), which controls the operation of the power module connected to the electric motor. The supply voltage is generated by the rectifier. For powerful motors, the rectifier is powered by a 3-phase network, for low-power motors, it is enough to supply power from a single-phase network. The first version of the tunable generator circuit is shown in Fig.3.
The generator is built on the timer KR1006VI1. Such generators are described in [2]. The frequency of the generated pulses in the circuit of Fig. 3 is described by the expression: F=1,46/(R1+R2+2R3)C. Frequency tuning (from 3 Hz to 3000 Hz) is carried out manually by adjusting the potentiometer R1 (twice) and switching the switch positions SA1 (500 times). Since a 6-phase converter divides the frequency by 6, frequencies from 0,5 Hz to 500 Hz can be applied to the motor. In cases where you need to accelerate the motor from low to high speeds, you can gradually increase the frequency in the circuit of Fig. 3 with switch SA1. The disadvantage of this scheme is that the increase in frequency occurs abruptly. For a smooth increase in frequency in automatic mode, voltage-frequency converters are well suited [3]. The domestic industry produced only one type of such a converter - the K1108PP1 microcircuit. The microcircuit has a number of disadvantages: the frequency range is only up to 10 kHz, the bipolar power supply is ±15 V. But it is quite suitable for powering electric motors. The frequency of the output pulses of the DA1 chip in the circuit in Fig. 4 is determined by the expression: . =Uin/(kIoR5C2), where constant parameters have the following values: Io=1 mA, k=75 kOhm.
With the ratings indicated on the diagram, the frequency is F = 34Uin, i.e. at a maximum input voltage of +15 V, it will be approximately 500 Hz. To obtain a wider frequency range, it is necessary to proportionally reduce the capacitance C2. The scheme works as follows. When the power is turned on, the capacitor C1 starts charging through the resistor R2. The time constant of the charge circuit at these ratings is 20 s, i.e. the entire overclocking process lasts approximately one minute. To match the high-resistance circuit with the input of the converter, a source follower on a field-effect transistor VT1 is installed. Since the input characteristics of field-effect transistors have a spread in cutoff voltage, adjustment has been introduced on the potentiometer R3. It is necessary to short-circuit the capacitor C1 with tweezers and achieve zero voltage at the source VT1. Potentiometer R1 is used to set the maximum generation frequency. Capacitor C1 is disconnected and the maximum required frequency is set by the frequency meter. Figure 5 shows the signal conditioner diagram of Figure 2.
The circuit consists of a counter-decoder DD1, in which 6 positions of the decoder are used to generate signals, and from the seventh position the signal is set to reset the counter. Its conversion factor is 6. As can be seen from Fig. 2, to form a signal of phase A, it is necessary to combine the first three positions of the decoder, for phase B - positions from third to fifth, for phase C - fifth, sixth and first. Figure 6 shows a power module for powering a three-phase motor, consisting of 6 VT1-VT6 drivers.
Two drivers are used for each phase, for example: for phase A, the high-side driver is VT1, and the low-side driver is VT2. Anti-phase signals are fed to the driver inputs: the upper one - A direct, the lower one A - inverted. That's why a 6-phase signal is needed. Both bipolar and high-power field transistors can be used as drivers. A number of companies produce modules of 6 drivers in one package. For example, International Rectifier produces the CPV363M4 module. with parameters: maximum collector-emitter voltage 600 V, maximum pulse current 50 A. Resistors R1-R3 are current sensors, voltages from them must be supplied to mode control nodes. The power supply of motors with a pulsed three-phase voltage, as we see, is quite simply implemented in practice. But this is only suitable for low-power motors. For example, in video cameras and video recorders, three-phase small-sized electric motors are used to feed the tape and to rotate the block of rotating heads of the BVG [4]. They are powered by a pulsed three-phase voltage, and special microcircuits have been developed for this, for example, the BVG motor driver XRA6459P1. For more powerful motors, it is still necessary to generate voltages that are close to sinusoidal in shape, because. Square wave voltages can cause large parasitic voltage surges that can lead to insulation breakdown. Figure 7 shows a two-level approximation to a sinusoidal signal.
In this case, the signal is formed by summing two rectangular sequences A1 and A2. As can be seen from Fig. 7, in order to form these signals, the 360° interval must be divided already into 12 parts. Therefore, one counter chip, as in Fig. 5, will no longer be enough. The number of logical elements will double. If the shaper in Fig. 5 can be assembled on 3 integrated circuits, then for a two-level shaper they will need 6. Separately, the question of the drivers. In the previous version, the drivers worked in the key mode: the transistor was either locked or opened to saturation. In this case, the heating of the transistor is very small and it does not need a heatsink. Consider an example. Supply voltage 60 V, operating current in saturation mode 10 A. When the transistor is locked, it does not heat up, in the open state to saturation, the voltage drop across it is approximately 0,1 V, therefore, power is released 10x0,1 \u1d 0,5 W, but only on a half-cycle, which means the average power is 7 W. If we switch to the linear mode of operation of the transistor, the dissipation power will increase sharply. For example, where there are halves of the signal in Fig. 30, the voltage drop across the transistor will be 5 V at a current of 150 A, i.e. power 1 watts. Given that this power is allocated for 6/25 of the period, we get an average power of 50 W, i.e. XNUMX times more! Now you have to install radiators. It is possible to do without radiators if each driver is made up of two transistors connected in parallel, signal A1 is applied to one of them (Fig. 7), and A2 to the other. Transistors will still operate in the key mode, but their number will double. For three or four or more levels of approximation of a sinusoidal signal, the complexity of the equipment will increase in proportion to the square of the number of levels. Therefore, this path is unpromising. In professional equipment, a sinusoidal signal is obtained in the manner shown in Fig. 8.
The clock signal is fed to the counter, the output code of which is the address of read-only memory (ROM), which contains the table of sines. Digital codes proportional to the values of the current sine are fed to a digital-to-analog converter (DAC), where they are converted into analog sinusoidal signals. To distribute them to the upper and lower drivers, a trigger and two keys are used. On the first half-cycle, the sinusoidal signal goes to the upper driver, on the second - to the lower one. About 20 years ago, we mass-produced the K568PE1 chip, in which the sine table was recorded. Now she can no longer be found. Therefore, the developer will have to compile the ROM firmware table himself and program the ROM chip, which, you see, is not available to everyone. There is an easier way to generate a voltage close to sinusoidal. This method is shown in Figure 9. If you multiply linearly increasing and linearly falling signals together, you get a parabolic signal, very close to a sinusoidal one.
A functional diagram of a device that implements this principle is shown in Fig. 10.
The generator supplies clock pulses in parallel to two counters. One counts for summation, the other for subtraction. The counter codes are coordinated with each other due to the fact that the zero state signal of the subtracting counter is a reset of the positive counter. The counter codes are sent to the digital multiplier, and from it to the DAC. The driver switching system is the same as in Fig. 8. But this circuit is easier to implement than the circuit in Fig. 8, because there are ready-made multiplier microcircuits. For example, in the CMOS series, the K561IP5 chip. You can do it differently: put a DAC at the outputs of the counters and connect their outputs to an analog multiplier, for example, K525PS2. Building a quality variable frequency drive, as you can see, is not as easy as it might seem. References:
Author: O.N. Partala
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