Capacitance meter on the logic element. Scheme, description

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ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING
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Capacitance meter on the logic element. Encyclopedia of radio electronics and electrical engineering

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Encyclopedia of radio electronics and electrical engineering / Measuring technology

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The proposed capacitance meter is built on a single logic chip. Two elements D1.1 and D1.2 form a pulse generator, in the feedback circuit of which, using the switch S1, the frequency-setting chains RP1-C1, RP2-C2 .. .RP5-C5 are included. The pulse frequency and depends on their ratings. respectively, the range of measured capacitances. In position "1" S1, you can measure capacitances up to 50 pF, in "2" - up to 500 pF, in "3" - up to 5 nF, in "4" - up to 50 nF and in "5" - up to 0.5 μF.

Capacitance meter on logic element

Logic elements D1.3 and D1.4 serve as a buffer. They are connected in parallel to provide sufficient charging current for the measured capacitor Cx. This capacitor, together with VD1, VD2 and C6, forms a voltage doubling rectifier. The rectified voltage is supplied to the measuring head PA1 (Ip=1 mA. Rr=240 Ohm), the deviation of the arrow of which directly depends on the capacitance Cx.

The device is configured separately for each range. Reference capacitors (with a known capacitance) are taken as Cx. Adjusted resistors set the arrow of the device to the required division of the scale.

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