TV SIESTA-J-3128. Encyclopedia of radio electronics and electrical engineering

Encyclopedia of radio electronics and electrical engineering / Телевидение

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TV SIESTA model J-3128, the appearance of which is shown in Fig. 1, - a portable black-and-white TV with a screen size of 31 cm diagonally and remote control. It provides power switching from an AC mains voltage of 220 (±10%) or 110 (+10%) V and from an external DC source of 12,6 V (±20%). The power consumed by the device from the network is about 30 W, and from an autonomous source - no more than 18 W.

The sensitivity of the TV image path, limited by synchronization, in the meter wave range (MB) is no worse (no more than) 40 µV, and in the decimeter wave range (UHF) - no worse (no more than) 70 µV. The nominal output power of the audio channel is 1 W. Dimensions (width x height x depth) of the TV - 330x255x385 mm.

The TV set includes an indoor antenna and a remote control (RC). The remote control can control the device at a distance of up to 5 m.

Turn on the TV with the button installed on its front panel. Moreover, pressing the power button immediately brings up the operating mode of the device. Using the "P+" or "P-" buttons you can switch programs, and using the "V+" and "V-" buttons you can adjust the sound volume.

The remote control contains a number of buttons for controlling and adjusting the TV. Any of the number buttons switches programs. Using the “P+” and “P-” buttons, the remote control switches programs sequentially in a ring. The “V+” and “V-” buttons adjust the sound volume, and the button with the icon in the form of a dynamic head crossed out with a cross can turn it off and turn it on again when pressed again. The "Menu" button calls up TV setup operations, and the "AC off" button turns it off.

The schematic diagram of the TV is shown in Fig. 2. It uses a photodetector A101 of infrared (IR) radiation with a remote control. The signal it receives through the R108C137 low-pass filter is supplied to the input (pin 5) of the N101 chip, the first of five NEC chips used in the TV.

(click to enlarge)

(click to enlarge)

The N101 chip as a control command decoder is a microprocessor with specialized ports. Each port performs a separate TV control function, generating corresponding signals.

The "AC off" command causes a negative polarity pulse to appear at pin 27 of the microprocessor, which opens transistor V140 through resistor R110. In this case, the capacitor C127 is charged through the emitter junction of the transistor V111, opening it to saturation. The collector current of the transistor flowing through the winding of the RL101 solenoid included in its circuit causes it to operate and turn off the mains power of the TV.

From the control buttons SW101 - SW105, located on the front panel of the TV, commands are sent through pins 12, 13, 15-17 of the microprocessor to the corresponding ports. As a result, it is possible to switch programs in direct (ascending numbers) with the “P+” button and in reverse with the “P-” button, control the sound volume to increase the level with the “V+” button or decrease it with the “V-” button, as well as control the TV settings "Menu" button.

Through pin 24, the low-pass filter R139С125 and the circuit C124R138, the signal that forms graphic images of executed commands (OSD) on the screen is supplied to the base of the transistor V501 of the video amplifier. Logic levels from pins 38-40 of the microprocessor through the corresponding low-pass filters R152C132, R153C131 and R154C130 control transistors V114-V116, respectively. Through these transistors, the necessary voltages to turn on the sub-bands are supplied to the corresponding terminals of the channel selector.

To ensure synchronization of the information displayed on the screen, horizontal and vertical pulses, respectively, taken from the output stages of the sweeps, are fed to pins 21 and 22 of the microprocessor. The amplitude and polarity of the horizontal pulses are determined by the elements C122, R136, C123, R135 and the cascade on the transistor V109, and the amplitude and polarity of the vertical pulses are determined by the elements C121, R134, R133, C120 and the cascade on the transistor V108.

The synchronization identification signal required for automatic tuning to television programs is fed to pin 6 of the microprocessor from the cascade on the transistor V101. It forms it from the clock pulses taken from the clock selector on the transistor V401.

To operate internal oscillators, a quartz resonator X101 at a frequency of 4 MHz (pins 7, 8) and a U-shaped filter C114C115L101 (pins 19, 20) are connected to the microprocessor.

Pin 9 of the microprocessor is intended to reset the program counter and set its zero address. When a +5 V supply voltage is supplied, transistor V102 opens and capacitor C106 begins to charge through resistor R110. However, at the initial moment the voltage on the capacitor is equal to level 0 and the duration of its action depends on the time constant for charging the capacitor. This level resets the program counter. After charging the capacitor to level 1, the microprocessor will begin to operate in accordance with its ROM program.

Controlling the volume and setting of the TV is provided by the formation of signals at the outputs of the corresponding ports with pulse-width modulation (PWM). From pin 35 of the PWM microprocessor, the volume control signal is converted by the circuit

C128R150 V volume control voltage. Through the divider R149R151 and the low-pass filter R148R160C302, it acts on pin 14 of the N301 chip.

From pin 1 of the microprocessor, the PWM setting control signal, generated by capacitor C139 and the sharpening circuit R129C101R102C140C102, is supplied to the base of transistor V105. From its collector, after passing through the four-bar RC circuit R104-R107C103-C105C138, it is converted into control voltage for setting the channel selector. The supply voltage to transistor V105 is supplied through resistor R103 from a stabilized source on zener diode V104, to which the video amplifier supply voltage from capacitor C131 is supplied through resistor R719.

To store information about settings for a long time, even in the absence of supply voltage, the TV uses a non-volatile programmable read-only memory device - the N102 chip, connected to the microprocessor through pins 32, 33.

The TV uses an all-wave channel selector manufactured in one of the countries of Southeast Asia, which provides reception of broadcast television channels in the MB (VHF) and UHF (UHF) bands.

The radio signals received by the antenna, passing through the channel selector, are converted into an intermediate frequency (IF) signal. This IF signal from the IF selector output through capacitor C201 is supplied to the IF pre-amplifier assembled on transistor V201. Its input impedance provides matching mode with the output of the channel selector in the IF band. The preamplifier compensates for the attenuation of the IF signal in the following SAW filter Z201. The filter generates the frequency response of an image IF amplifier (IFI) with specified attenuation rates in the spurious signal suppression band and the required IF signal bandwidth. The advantages of such filters include the stability of the frequency response in the passband of the UPCH and their repeatability during manufacturing.

The main amplification of the IF signals occurs in the N201 microcircuit, which contains the main UPCH, a video demodulator operating in synchronous detection (SD) mode, an SD demodulator of the automatic local oscillator frequency control (LOF) signal with a DC error voltage amplifier, a pre-video amplifier and an automatic gain control device ( AGC).

The IF signal passes through pins 1, 16 to the microcircuit, where it is amplified in the UPCH and detected by the video demodulator. Inside the microcircuit, the received video signal comes to the preliminary video amplifier.

The mode of phase relations of operation of the SD video demodulator is set by the first exemplary circuit L204C220R212 connected to pins 8 and 9 of the N201 chip. The second model circuit L205C219C213-C215, connected to pins 7, 10 of the N201 chip, provides the phase relationships of the SD demodulator of the APCG system. In it, the frequency of the IF signal is compared with the tuning frequency of the reference circuit and an error voltage is generated that is proportional to the difference between these frequencies. The value and sign of the error voltage are determined by the deviation of the local oscillator frequency in the channel selector from the nominal one. The APCG system maintains the frequency of the channel selector local oscillator with an accuracy determined by the residual detuning in the control loop. To change the local oscillator frequency to the value of the residual detuning, the error voltage from the output of the DC amplifier through pin 5 of the N201 microcircuit and the C209R128 circuit is supplied to the emitter follower on transistor V107, from the output of which it passes to the input of the microprocessor N101 (pin 18). In the microprocessor, the error voltage is summed with the channel selector setting voltage in the PWM signal generation mode, arriving at output 1 of the microprocessor.

The video signal inside the N201 chip also comes to the AGC device, which has two outputs. Through one of them in the microcircuit, the AGC voltage acts on the main UPCH. The latter is a three-stage differential amplifier with adjustable emitter feedback, the circuit of which provides the main direct control of the gain of the image channel.

At the other output (pin 4 of the microcircuit) of the AGC device, the channel selector gain control voltage is generated. It is supplied to the selector through filter R210C119. The AGC voltage on it, in contrast to the AGC voltage of the main UPCH, is affected in a delay mode, in which control of the selector gain begins from a certain level of the radio signal at its antenna input. The delay is set through pin 3 of the N201 chip using the voltage from the variable resistor RP201 motor. The AGC time constant is set by the R208C208 circuit through pin 14 of the microcircuit.

The amplified composite video signal, containing the actual video signal with sync pulses and the second audio IF signal, is obtained at pin 12 of the N201 chip. Through the RF correction circuit L202R215C407, resistor R501 and notch piezoceramic filter Z501, which suppresses the signals of the second IF sound, it is supplied to the base of transistor V501 of the output video amplifier with RF correction elements R502, C501, R505, C503. The video amplifier supply voltage is formed by rectifying pulses taken from the horizontal transformer T702 through resistor R717, diode V709 and capacitor C719. The load of the video amplifier is resistor R503. Through circuit C504R508 and resistor R803, the video signal reaches the cathode of the kinescope.

The variable resistor RP502, included in the emitter feedback circuit of the video amplifier R502C501 - C503R505RP502, can change the gain of the cascade, i.e., the image contrast. The brightness is adjusted with a variable resistor RP501. From its engine, voltage is supplied through resistor R506 to the cathode of the kinescope, setting its DC mode. To extinguish the beam during the reverse stroke vertically and horizontally, vertical (via capacitor C501, resistor R414 and diode V410) and horizontal (via resistor R402) positive pulses are applied to the emitter of transistor V716, closing the transistor.

From the complete video signal that has passed through the C301 isolation capacitor, the Z301 piezoceramic filter selects the second audio IF signal, which, through pins 12 and 13 of the N301 chip, comes to the limiting amplifier located in it. In addition to it, the microcircuit contains an FM audio signal SD demodulator, an electronic volume control and a power amplifier.

In the demodulator, the audio IF signal from the limiting amplifier is detected, resulting in a 3H signal. The exemplary circuit L301C308, which provides phase relations for the operation of the demodulator, is connected through pins 1 and 2 of the microcircuit. Inside it, the 3H signal passes through the electronic volume control, and then through the capacitor C313, connected between pins 4 and 7, to the power amplifier. Volume control is provided electronically - by applying a constant control voltage to pin 14 of the microcircuit.

From pin 8 of the N301 microcircuit, through the isolation capacitor C305, the amplified 3H signal comes to the B301 dynamic head with a nominal resistance of 8 Ohms. Through pin 6 of the microcircuit, a decoupling capacitor C312 is connected to the power amplifier, and through pin 9 a feedback correction capacitor C307 is connected.

The complete video signal through circuit R413C416R414C417 is also supplied to the base of transistor V401, on which the sync pulse selector is assembled. The transistor mode is selected in such a way that it opens only with synchronizing pulses, which are released at its load - resistor R415.

To isolate vertical sync pulses, a two-section low-pass filter R405C405R404C404 is included, in which horizontal sync pulses are filtered out. The selected personnel sync pulses through the capacitor C403 and pin 5 of the N401 microcircuit synchronize the personnel pulse generator located in the microcircuit. In addition, it contains a sawtooth voltage generator and a vertical scan output stage. The master circuit of the frame pulse generator is formed by elements RP403, R401, C402 and is connected to pins 5 and 6 of the microcircuit. The trimming resistor RP403 sets the required frame rate.

The generated personnel pulses inside the microcircuit synchronize the sawtooth voltage generator. Through pins 4 and 7 of the microcircuit, resistors R417, PR401, capacitor C419, the sawtooth voltage is supplied to the vertical scan output stage. The RP401 trimmer resistor changes the vertical size of the image, and the RP402 trimmer resistor included in the C408RP402 circuit changes linearity.

Frame pulses amplified in the output stage through pin 1 of the N401 chip and separating capacitor C413 arrive at the frame coils L401 of the deflection system (OS) of the kinescope. The feedback signal passes through capacitor C412 and pin 3 of the microcircuit to the output stage.

Elements R406, C410, connected to pin 9 of the microcircuit, and capacitor C406, connected to pin 4, provide feedback to the vertical scanning stages, stabilizing the vertical size of the image.

Horizontal sync pulses from the collector of the transistor V401 through the V701R701R702C701 circuit pass to the phase detector of the PLL (phase locked loop) device, assembled on diodes V702, V703. From horizontal transformer T702, through circuit R719C709, horizontal reverse pulses are supplied to the phase detector, which are integrated by capacitor C703. From the PLL device, the regulating voltage through the filter R705C704R707C705 and the resistor R706 is supplied to the base of the transistor V704 of the master horizontal blocking oscillator.

The peculiarity of the applied horizontal master oscillator is its very stable operation, which does not require adjustment of the frequency of the lines.

In the emitter circuit of the V704 transistor, horizontal trigger pulses are generated, which, through the R712C710 circuit, arrive at the base of the V705 transistor of the horizontal scanning pre-output stage. The primary winding of the matching transformer T701 is included in the collector circuit of the transistor. Pulses from its secondary winding control the emitter junction of the transistor V706 of the horizontal output stage.

The output horizontal transformer T702 is connected directly to the collector of the output transistor and the horizontal coils L707 OS through the capacitor C717 and the linearity regulator of the lines L706. In the oscillatory circuit formed by the equivalent inductance of the windings (transformer and horizontal coils OS) and the capacitance of capacitors C721-C724, ​​oscillatory processes occur that create the necessary deflecting current in the horizontal coils. In this case, powerful horizontal pulses are formed on the collector of the output transistor and the terminals of the transformer windings. A damping diode V706 is also connected to the collector of transistor V707.

On the capacitor C716, connected to the primary winding of the horizontal transformer, during the operation of the sweep, a constant voltage boost is formed, which, summing up with the voltage of the power source, provides an increased supply voltage to the output stage.

The T702 line transformer contains a kinescope anode voltage rectifier. By selecting capacitors C722, C723, you can change the duration of the line scan reverse, and therefore the voltage at the anode of the kinescope, i.e., the horizontal size of the image.

The mode of the accelerating and focusing electrodes of the kinescope is determined by the same voltage source on the diode V709 and capacitor C719, from which the output video amplifier is also powered.

Elements C727, R720, V710, R805, C801 provide the necessary mode of operation of the kinescope modulator. Remaining for some time after turning off the TV, the voltage on the capacitor C727 closes the kinescope, protecting its screen from burning.

The mains voltage is supplied to the primary winding of the T601 mains transformer. From its secondary winding, the reduced alternating voltage is rectified by a full-wave rectifier using diodes V601, V602 and capacitor C603.

The compensation stabilizer of the rectified voltage is assembled using V603 transistors. V604, V606 and zener diode V605. The regulating element of the stabilizer - transistor V604 is connected in series with the load. The value of the output voltage of the stabilizer is set with a variable resistor RP601.

The TV can also be powered from a car battery by supplying voltage from it through the female connector XS1. The connecting pin part inserted into it simultaneously mechanically acts on the contacts closed when powered from the mains, which are then broken.

Switch S601 switches the TV's power supply depending on the network voltage: 220 or 110 V.

A view of the C3adi TV without a back cover is shown in fig. 3.

See other articles Section Телевидение.

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