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Low-power field effect transistor KP214A9. Reference data

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Silicon n-channel field-effect transistor KP214A9 with an insulated gate and channel enrichment, with a built-in protective back-connected diode, is manufactured using planar epitaxial technology. Transistors are designed to work in secondary power sources with a transformerless input, in regulators, stabilizers and voltage converters with continuous and pulse control, in control units for low-power electric motors and in other electronic equipment for the national economy and everyday life.

The transistors are packaged in a plastic package KT-46A (SOT-23) with flat tinned leads (Fig. 1) intended for surface mounting.

Low-power field-effect transistor KP214A9

Foreign analogue of the transistor KP214A9 - 2N7002LT1.

The pinout and the diagram of internal connections are shown in fig. one.

Main technical characteristics at Tacrav = 25+10 °С

  • Threshold voltage, V, at a drain current of 0,25 mA and connected gate and drain......1 ...2,5
  • Open channel resistance, Ohm, no more, with a pulse duration of not more than 300 μs and a duty cycle of at least 50, a drain current of 0,5A and a gate-source voltage of 10 V ...... 7,5
  • Open channel resistance, Ohm, no more, with a pulse duration of not more than 300 μs and a duty cycle of at least 50, a drain current of 0,05 A and a gate-source voltage of 5 V ...... 7,5
  • Residual drain current, μA, no more, at a drain-source voltage of 60 V and zero gate voltage ...... 1
  • Gate leakage current, µA, no more, at zero drain-source voltage and gate-source voltage ±20 V......±0,1
  • The slope of the current-voltage characteristic, mA / V, not less, with a pulse duration of not more than 300 μs and their duty cycle of at least 50, at a drain-source voltage of 7,5 V and a drain current of 0,2 A ...... 80
  • Constant forward voltage of an open protective diode, V, not more, at zero gate-source voltage of the transistor and current through the drain and source terminals 115 mA ...... 1,5
  • Thermal resistance crystal-environment, °С/W, no more......625
  • On / off time *, no, no more, at a drain-source voltage of 25 V, a drain current of 0,5 A and an output impedance of the signal source of 25 Ohm ...... 30/40
  • Transistor capacitance*, pF, no more, at zero gate-source voltage, drain-source voltage 25 V and frequency 1 MHz
  • input ...... 50
  • weekend ...... 25
  • through passage......5

* Reference parameters.

Limit values

  • The highest drain-source voltage, V ...... 60
  • Maximum gate-source voltage, V ...... ± 20
  • The highest pulsed gate-source voltage, V, with a pulse duration of not more than 1 s and their duty cycle of at least 300 ... ± 40
  • The highest direct drain current *, mA, at a gate-source voltage of 10 V and an ambient temperature of not more than 25 ° C ...... 115
  • The highest pulsed drain current**, mA, with a pulse duration of not more than 300 µs......800
  • Maximum continuous dissipated power***, W, at ambient temperature not more than 25 °C......0,2
  • The highest forward current of the protective diode, mA......115
  • The highest pulsed current of the protective diode**, mA, with a pulse duration of not more than 300 µs ..... 800
  • The highest temperature of the crystal, ° С ...... 150
  • Ambient temperature operating range, °С -55...+125

* When the ambient temperature rises up to 125

The drain current must be reduced (provided that the value of the highest dissipated power is not exceeded) down to zero in accordance with the graph in fig. 2.

** Provided that the value of the highest power dissipation is not exceeded. *** In the range of ambient temperature from 25 to 125°C, the maximum dissipated power Рmax is calculated by the formula

where RTkp-cp is the crystal-environment thermal resistance.

Permissible value of static potential - 30 V in accordance with OST 11073.062. The mode and conditions for mounting transistors in equipment - according to OST 11336.907.0. When soldering leads with a soldering iron, it is necessary to remove heat with special tweezers with massive copper sponges. Tweezers are installed on the output near the housing. The soldering iron must be grounded.

Low-power field-effect transistor KP214A9

The main typical graphical dependences of the parameters of the KP214A9 transistor are shown in fig. 3-7. On fig. Figures 3a and 25b show the dependences of the drain current lc on the drain-source voltage Us at the crystal temperature Tcr = 10±150°C and 4°C. The dependences of the drain current on the gate-source voltage Uzi are shown in fig. 5, and the normalized temperature dependence of the resistance of the open channel RK norms - in fig. XNUMX.

Low-power field-effect transistor KP214A9
Rice. 6 illustrates the nature of the change in the capacitance of the transistor when the drain-source voltage changes, and fig. 7 - current-voltage characteristic of an open protective diode. The dependence of the maximum allowable direct drain current lc max on the crystal temperature is shown in fig. 2.

Author: V.Kiselev, Minsk, Belarus

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