ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING Digital tuning scale for a VHF radio receiver. Encyclopedia of radio electronics and electrical engineering Encyclopedia of radio electronics and electrical engineering / radio reception You have received an interesting and, perhaps, previously unknown radio station on your favorite receiver. Naturally, you would like to remember the settings. But here's the problem - your receiver has the most ordinary linear scale with a "running" pointer supposedly the tuning frequency. No, it does not show you any frequency - at best, the relative position of the setting along the length of the scale. It is quite difficult to remember the exact position of the pointer, and it is simply impossible to determine the radio station, even with the available list of the wave schedule. It would be nice to see the usual numerical value of the frequency when tuning - all problems are immediately removed! We offer you such an opportunity. In fact, the proposed device compares favorably with most similar devices by the absence of microcontrollers and microprocessors that require a laborious programming process. This scheme was developed for a VHF radio receiver with a range of 65 ... 73 MHz. The resolution of the tuning frequency reading is 10 kHz. The information is displayed on a four-digit LCD indicator. The scheme of the device of the preliminary frequency divider (PDF) is shown in fig. 1, and frequency measurement devices - in fig. 2. The high-speed MAP divides the receiver local oscillator frequency by 100. Next, a signal with an amplitude of about 5 V is fed to the input of a rectangular pulse shaper on the DD1 microcircuit (Fig. 2). The amplitude of these pulses is 9 V. From the output of the shaper, rectangular pulses are fed to the input of a divider by 100, made on microcircuits DD2 and DD3. On the DD4 chip, an oscillator with quartz frequency stabilization is assembled, which is necessary for the formation of a measuring period (1 s) and a frequency of 64 Hz for gating decoders and excitation of the LCD. With a positive voltage drop at pin 5 of the counter DD4, the differentiating circuit R5C4 generates a state recording pulse from the outputs of the reversible counters DD6-DD9 to the decoders DD10-DD13, respectively. After a period of time determined by the delay circuit R6, C5, DD5.1, the differentiating circuit R7C6 generates a write pulse to the counters from the inputs of the parallel loading of the latter. In this case, the negative voltage drop at the output of the DD5.2 element sets the RS flip-flop on the DD5.3 and DD5.4 elements to a state in which a log.6 level is formed at the input of the counting direction control DD9-DD0. As a result, the counters work by subtracting the value of the intermediate frequency. The process of counting to IF subtraction and then, after overflow, to addition takes place during one measurement period. As a result, the indicators show the tuning frequency of the radio. The IF value can be chosen by anyone. It depends on the state of the parallel loading inputs of counters DD6-DD9. In this device, the IF value is selected to be 10,7 MHz (this is the value for most modern receivers). When all parallel loading inputs are in zero state, the device operates with zero IF - frequency counter mode. Assume that the local oscillator frequency is 80 MHz, then the receiver will be tuned to a frequency of 69,3 MHz (80 - 10,7 = 69,3). At the same time, at pin 12 of the DD3 chip, the frequency is 8000 Hz. After writing information to the counters DD6-DD9 and setting their outputs 10 level log.0 with each pulse of positive polarity on their outputs 15 they begin to reduce their state by one. After the arrival of the 1070th pulse counters DD6-DD9 are set to zero. The resulting negative voltage drop at the transfer output of the counter DD9 switches the RS-flip-flop to the opposite state, in which the inputs control the direction of the account - log level. 1, so the state of the counters is increased by one. As mentioned above, the frequency at the counting inputs is 8000 Hz, and the duration of the measurement period is 1 s. This means that there are 8000 pulses in one measuring period. During this period, 1070 of them counters are subtracted to zero, and then the remaining 6930 pulses are added. Since the outputs of 9 counters DD6-DD9 have a log.0 level, the counters work both for subtraction and addition in decimal mode. Therefore, at the end of the measurement period, the counters are in state 6930, which is written to the decoders in a seven-segment code and, being displayed on the indicator, remains until the end of the next measurement. Capacitor C7 prevents false triggering of the RS flip-flop. The device is assembled on two printed circuit boards made of double-sided foil fiberglass and placed in a copper sheet screen connected to a common wire. The ILC indicator 5-4/8 is installed on top of the DD10-DD13 microcircuits. Hanging mounting is also possible. In the absence of an LCD, LED or fluorescent indicators can be used, however, in this case, the current consumed by the device will increase significantly. With the IZhTs5-4/8 indicator, the current consumed from the power supply via the +9 V bus is about 35 mA. If the LED indicators are with a common anode, then the conclusions of 6 decoders should be connected to the +9 V bus. If they are with a common cathode or luminescent (IV-3, IV-6), the conclusions of 6 decoders are connected to a common power bus. A sinusoidal voltage of the local oscillator frequency with an amplitude of at least 0,2 V should be applied to the input of the MCA. If the parts are in good condition and there are no errors in the installation, the adjustment consists in selecting the resistor R2 in the MCA. By selecting this resistor, it is necessary to achieve a voltage of +4 V at the collector of transistor VT1. The proposed device can also be used in receivers with a range of 88 ... 108 MHz. The discreteness of the frequency reading in this case will be 100 kHz. To do this, in the device circuit, in the frequency meter module, instead of the segment h of the third digit, connect the segment h of the second digit to the common wire. Between the output of the shaper (pin 10 of the DD1.3 element) and the input of the DD2 counter, you will need to turn on another frequency divider with a division factor of 10. It can be performed on the K561IE8 counter by turning it on in the same way as DD2. In the MAP circuit, the capacitance of the capacitor C4 must be reduced to 22 pF and a resistor with a resistance of 33-180 ohms should be installed in series with it (select experimentally). The selection criterion is to maintain a constant voltage on the collector of the transistor VT1 within 2,5 ... 2,8 V over the entire frequency range of the local oscillator. The sensitivity of the MAP in the range of 88 ... 108 MHz is about 400 mV. The device has been tested with receivers using an IF of 10,7 MHz. Higher IF values have not been tested. Author: M. Ozolin, Krasny Yar village, Tomsk region. See other articles Section radio reception. Read and write useful comments on this article. Latest news of science and technology, new electronics: Artificial leather for touch emulation
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