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ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING Transceiver DM-2002. Encyclopedia of radio electronics and electrical engineering
Encyclopedia of radio electronics and electrical engineering / Civil radio communications "There are no "little things" in a good design, and even the power supply requires the same attention as the main path," says Cyrus Pinelis (YL2PU), the author of this transceiver. Many are familiar with his previous shortwave transceiver designs, the "Largo-91" and "D-94". In his new development, the author managed to achieve the characteristics of the receiving path comparable, and in some ways superior to the characteristics of the best professional receivers. Experience has shown that it is possible to make a good transceiver at home. The author's many years of work will help a medium-skilled radio amateur build a good radio receiving path. Before you start repeating this transceiver, once again brush up on some of the theoretical premises [1-3] that formed the basis for constructing its receiving path. The author's attention was focused on obtaining high dynamic characteristics of the receiver, as the main ones, given the current workload of amateur radio (unfortunately, not only amateur stations) and the high density of stations in some cities. The proposed version of the transceiver was developed by the author based on the recommendations for building a high-quality receiving path set out in [1, 2], namely: a) build a path with only one frequency conversion; b) before the first filter of the main selection, the minimum necessary gain must be provided while maintaining linearity over the entire signal range; c) no adjustments and non-linear elements before the first FOS; d) only passive high-level balanced mixers; e) the noise level of its own local oscillator must be at least 3 dB lower than the noise track of the receiving path; f) use high-quality filters for the main selection, and at the receiver input band, also high-quality, filters with a frequency ratio of less than 1:2; g) to ensure high parameters in terms of dynamics, ensure the same high selectivity (>140 dB in the adjacent channel), subject to the minimum phase noise and sequential selection. When testing and measuring the main parameters of the transceiver, which were carried out by Peter Brecht (DL40BY) and Uwe Loebel (DL1DSL) in the laboratory of Stabo Elektronik GmbH & KoG in Hildesheim (Germany), recommendations were made on the use of an ultra-high level mixer and on the features of its installation, which allowed increase blocking parameters. The "DM-2002" transceiver allows you to work by telephone (SSB) and telegraph (CW) on any of the nine amateur KB bands. Main technical data:
A small theoretical digression... According to [3], the single-signal dynamic range (DB0) best characterizes the operation of the receiver in real conditions, since it allows estimating the maximum level of interference that degrades reception, and shows the stability of the receiver to the phenomena of "clogging" (blocking) and cross modulation. DB1 is limited from below by the minimum receiver noise: Prf = (-174) + Frx + (101g Bp), where Frx - own noise of the receiver <10 dB; Вp is the bandwidth of the filter of the main selection of the receiver in Hz; and from above - the limits of the linear part of the characteristics of its cascades IP3, i.e., the point where the signal at the receiver output begins to decrease (by 3 dB) when the interference signal reaches its maximum level. For greater clarity, let us turn to Fig. 1 taken from [2].
The interval separating the IP3 point from the receiver noise floor Prf should be as large as possible, since it defines two parameters - the DB blocking dynamic range and the DB3 intermodulation dynamic range. DB1 is the linearity range of the dynamic response of the receiver; DB3 - range of "intermodulation-free" processing of a symmetrical two-tone signal. The lower limit of both dynamic ranges is Prf. The IM dynamic range is more important because it is determined by the power level Ps3 of the receiver's inevitable 3rd order IM noise, which is the same as Prf. With Ps3 = Prf, the level of interference (noise and intermodulation) increases by 3 dB, resulting in a deterioration in the threshold sensitivity of the receiver by these XNUMX dB. Explanations for fig. one:
The transceiver is made according to the superheterodyne circuit with one frequency conversion. Its block diagram is shown in fig. 2. The device consists of fourteen structurally complete functional units A1 -A14.
When receiving, the signal from the antenna through one of the low-pass filters located in node A1 and a two-section attenuator located in node A2 enters node A3. In node A3 there are bandpass filters, common, like a low-pass filter, for both reception and transmission. Next, the signal enters the A4-1 node, where the first transceiver mixer, two pre-IF stages, the first main selection filter, as well as the buffer stages of the IF, local oscillator and transmission path are located. The first mixer of the transceiver is reversible, common for the receiving and transmitting paths. At the choice of the operator, it can operate in one of two modes: passive or active, with a gain of up to +4 dB. A sinusoidal local oscillator (VFO) voltage is applied to the mixer through a broadband amplifier. Why not meander? Yes, an ideal meander with fronts less than 4 would not be bad if ... Here is the stumbling block! Obtaining fronts of 4 or less with a duty cycle of one is a big technical problem and any mini-inductance or mini-reactivity creates problems of front creep (this is installation and much more ...). Also, don't forget about the leakage of harmonics from these "steep" fronts. Even if there is no direct leakage, then this will undoubtedly bring its contribution to the noise of the tract. Of course, in industrial conditions all this can be solved, but not at home, on the knee ... hi! Particular attention in the receiving path of the transceiver is given to the optimal distribution of the signal level over the cascades and obtaining the maximum values of the signal-to-noise ratio. Two cascades of preliminary amplifiers, facing the first FOS, compensate for the total attenuation in the LPF, DFT and mixer. The transceiver uses a sequential IF signal selection scheme. A strong argument in favor of such a solution is the recommendation given in [3]: "In a properly designed receiver, the FOS attenuation outside the passband should be equal to the value of a single-signal DD receiver. Increasing one of these values without increasing the other is practically useless. ... Further, the total gain of the IF must be less than the attenuation of the FOS outside the passband, otherwise strong out-of-band signals will be amplified along with weak useful ones and interfere with reception. In other words, in order to obtain a signal blocking level (single-signal dynamic range) of 130...140 dB, the FOS must also provide attenuation beyond the passband of 130...140 dB (at least on channels of ±5...10 kHz from the signal). Accordingly, the larger the blocking digit, the greater the DB3 scores. As you can see, it is unrealistic to solve this problem with one filter. The way out is as follows: make the IF gain no more than 50 ... 60 dB, and at the output of the path, as an element of communication between the IF and the detector, put a second filter, and not an average "cleanup", but a full-fledged one, similar to the first FOS. It is quite natural that the characteristics of the filters should be identical. According to rough calculations, with out-of-band filter attenuation, for example, 80 dB, and IF gain = 50 dB, only 30 dB remains from the selection of the first filter, which is clearly small for the path. But when we turn on another such filter, we get 30 + 80 = 110 dB. In the transceiver with filters made by the author, the selectivity in the adjacent channel (with a detuning of ±5 kHz from the band) was 150 dB. This practice of building the IF path is used by the author already in the third development. So, after the first FOS and the following broadband amplifier, which compensates for losses in the filter, the received signal enters the A4-2 node. Node A4-2 contains the main IF, the second FOS for SSB and CW, the detector and the preliminary ULF. The reference frequency generator signal is fed to the detector from node A6-2. Next, the received signal enters node A5, where it is amplified and processed at a low frequency. The A5 node contains a passive low-pass filter with a bandwidth of about 3 kHz and an active filter with a bandwidth of 240 Hz to increase selection in CW mode. The final ULF and the AGC amplifier are also located there. The AGC system controls only the main IF. There are no adjustments in the preliminary stages of the IF, as they contradict the laws of constructing a linear path. In transmit mode, the signal from the microphone is sent to node A6-1. It includes a microphone amplifier and a "Speech" processor with two EMFs. Further, the signal enters the A6-2 node, where the reference generators of the upper and lower bands, the shaper and adjustable amplifier of the DSB signal, as well as the CW signal shaper are located. From the output of node A6-2, the generated DSB or CW signal enters node A4-2. Here the signal passes through one of the filters - either wideband, with the selection of the SSB signal, or narrowband CW. Then the signal enters the mixer node A4-1, where it is transferred to one of the operating frequencies of the transceiver. After passing through the DFT, node A3, the signal is amplified by the transceiver power amplifier located at node A2. Further, through the low-pass filter of node A1, the signal enters the antenna. The switching of the switching elements of the ranges in the nodes A1, A3 and the local oscillator blocks is controlled by the node A9. Node A7 contains VOX, anti-VOX and keys that form the control signals for the receive (RX) and transmit (TX) modes of the transceiver. A modern high-quality transceiver includes, as a local oscillator, a frequency synthesizer. At the moment, for a receiver with a large dynamic range and high sensitivity, it is extremely difficult to build a synthesizer with low phase noise at home. It is phase noise that affects the selectivity in the adjacent channel, and for our transceiver this figure should be at a level of > -140 dB / Hz, which is not entirely realistic. As an alternative, the use of conventional LC heterodynes in conjunction with a frequency stability maintenance system (FLL + DPKD), which makes it easy to repeat it at home. The declared parameters of the transceiver receiver were obtained using conventional LC local oscillators, as having minimal phase noise. After them, low-frequency filters of at least the 5th order were used. There are two such local oscillators in the transceiver, nodes A12 and A13. The use of a proportional control system for the frequency of one of the local oscillators, node A10, made it possible to obtain stability better than 10 Hz / h. In node A8 there is a frequency divider of the local oscillator A12 and common for both LPF generators. Node A11 - digital scale. The transceiver is powered by node A14. The digital and analog parts of the transceiver are powered by separate sources and regulators. Also, local low-power stabilizers are used on the transceiver boards. All transceiver nodes will be described in more detail in the relevant sections. Node A1. Low Pass Filters The circuit (Fig. 3) consists of five LPFs of the 5th order. For the ranges of 7.. .28 MHz, elliptical low-pass filters are used, since they have an increased steepness of the slopes.
Node A2. Transmitter power amplifier. Broadband transceiver power amplifier (Fig. 4) - two-stage. At the input of the amplifier, an attenuator R2-R4 is included with attenuation of -3 dB. The operating mode of the transistor VT2 is set by the trimmer resistor R12.
To prevent self-excitation of the transistor VT2, a ferrite ring is put on its drain output. Relays K1 and short circuit connect the input and output of the amplifier to the signal path in the transmission mode. Relays K4 and K5 include attenuator links -10 dB (R19-R21) and -20 dB (R22-R24) in the signal circuit in receive mode. The attenuators are separated from the PA by a shielding partition. Elements R17, VD3, R18, C16, C17 - circuits for indicating the output power of the transceiver. The author tested the amplifier with two KP907A transistors connected in parallel, as well as with two KP901A. In both cases, the output power was about 40 W, with an output stage current of about 1 A. The use of KP901A is not desirable, since it does not allow obtaining a uniform frequency response of the amplifier. The blockage of the frequency response above 15 MHz does not eliminate even the selection of transistors and correction elements in the first stage. Three amplifiers made in a row on KP907A showed good repeatability, and the frequency response did not have to be corrected. Node A3. Input filters (DFT). Seven filters of the 3m structure were used to cover all ranges [5]. The filter scheme is shown in fig. XNUMX.
The implementation of input filters should be approached very responsibly, because the attenuation in the band, and hence the signal-to-noise ratio, will depend on the quality of their manufacture and tuning. The quality factor of all coils should not be lower than 200, and preferably higher ... For design reasons, the main radio path of the transceiver is divided into two nodes: A4-1 and A4-2. Node A4-1 (Fig. 6) contains the first mixer, IF preamplifiers, the first main selection filter, the local oscillator signal amplifier, the signal amplifier of the transmission path and the signal switch. The total gain of this part of the radio path does not exceed 10 dB. All stages of the node use 50-ohm technology.
In the receive mode, the signal from the DFT (see Fig. 5 in the first part of the article) is fed to pin 1 of node A4 - 1. At the input of the path to suppress radio interference at the intermediate frequency of the transceiver (8,862 MHz), the notch filter L1C1, ZQ1 - ZQ3 is turned on. The first mixer of the transceiver is reversible, common for the receiving and transmitting paths. It is made according to a balanced circuit on broadband transformers T1 - TZ and a DA1 chip of the KR590KN8A type, shown in fig. 6 as two transistors. The KR590KN8A microcircuit is a high-speed four-channel analog switch; four field-effect transistors with the same characteristics on a common substrate. The transistors of the microcircuit are connected in parallel to the mixer circuit, two in each arm (in Fig. 6, the microcircuit pin numbers are indicated in brackets). Such an inclusion made it possible to obtain a low resistance of the open channel drain - source of transistors, less than, for example, in KP905, which significantly reduced the losses in the mixer in the passive mode. As already mentioned, the mixer can operate in two modes - passive and active. The active mixer mode, with a gain of +3 ... 4 dB, is switched on by applying a supply voltage of +15 V to pin 2 of node A4 - 1. A sinusoidal local oscillator signal is supplied to the gates of the mixer transistors through a balun transformer TZ, previously amplified to a level of 3 ... 4 V by a broadband amplifier based on a VT2 transistor. The voltage of the local oscillator signal applied to the input of the amplifier, pin 4 of node A4 - 1, should not exceed 200 mV. A matching circuit L2, C17, R17, L3, C16, the so-called diplexer, is connected to the mixer output. Its tasks are to improve the dynamic range of the mixer, to isolate the intermediate frequency signal and to rid the subsequent cascades of the IF as much as possible from the "bouquet" of conversion products. The selected IF signal through a switch on the VD2 diode is fed to high-linear low-noise preliminary amplifiers made on transistors VT3, VT4 according to the amplifier circuit with reactive negative feedback [1]. Amplifiers of this type have high sensitivity and a large dynamic range. To increase the stability of operation, the amplifier stages are stabilized by the base current. Also, to prevent excitation at microwave frequencies, ferrite rings are put on the terminals of the collectors of transistors VT3, VT4, indicated in the diagram - FR. To weaken the signal feedback coefficient, the amplifiers are decoupled from each other through an attenuator on resistors R25 - R27 with attenuation value - 3 dB. A filter of the main selection ZQ4 is connected to the output of the amplifier on the transistor VT8 through a step-up transformer T4. The filter circuit is shown in fig. 7.
It is made according to the scheme of a multi-link ladder filter on seven quartz resonators ZQ1 - ZQ7. The prototype was "peeped" in the schemes of old army receivers of the R-154 type ("Amur", "Molybdenum"), where old low-quality crystals were used at 128 kHz. On modern resonators designed for PAL / SECAM television decoders, the filters turned out with the following characteristics:
The resonators, shown in the diagram by a dotted line, can be installed if the slope of the filter slopes is insufficient. After the filter, the signal is fed through a step-down transformer T9 to a broadband amplifier based on a VT5 transistor. The transistor is connected according to the common gate circuit, operates at a relatively large drain current, has low intrinsic noise and a large dynamic range. Its task is to compensate for attenuation in the filter and transformers. From the tap of the transformer T10 through the capacitor C3O and output 8 of the node, the received signal is fed to the main IF, node A4 - 2. In the transmission mode, the signal formed in node A4 - 2 CW or SSB is fed to pin 3 of node A4 - 1, the input of the broadband amplifier of the transmission path, made on the transistor VT1. From the output of the amplifier, the signal through the capacitor C5 and the switch on the diode VD1 is fed to the mixer T1 - T1 DA1, where it is transferred to one of the operating frequencies of the transceiver. Through pin 4 of node A1 - 3, the signal is fed to node AXNUMX (DFT). The passage of the signal in the directions corresponding to the modes of reception and transmission is controlled by a switch on pin diodes VD1VD2 of the KA507A type. The diodes are unlocked when a control voltage is applied to pin 6 (RX) or pin 7 (TX) from node A9 of the transceiver. The choice of these diodes is not accidental. In the open state, their resistance is 0,1 ... 0,4 Ohm, and they can transmit power up to 500 watts. The same circuits supply voltage to the amplifying stages of the node, operating in the appropriate modes. The diagram of the main IF amplifier, node A4 - 2 is shown in fig. 8. The output impedance of node A4 - 1 and the input node A4 - 2 - about 50 ohms, which allows you to connect them with a coaxial RF cable. The input stage on transistors VT1, VTV, connected according to the common gate circuit, has a small gain, low noise and a large dynamic range. The cascade is loaded on the L1C3 resonant circuit tuned to the IF frequency.
The main IF gain is carried out by a four-stage amplifier on two-gate field-effect transistors VT2 - VT4, VT10. The voltage at the first gates of the transistors is stabilized at +3 V by the zener diode VD1. The second gates of the transistors provide manual or automatic (AGC) gain control, as well as automatic blocking of the IF during transmission. To do this, a control voltage from 2 to +0 V from node A8 is supplied to the transistor gates through terminal 5 of the node. The gain of the IF path of node A4 - 2 does not exceed 60 dB. Cascades on transistors VT2, VT3, VT10 have a Ku of about 16 dB each, a cascade on VT4 - about 6 dB. The choice of this gain distribution is important, and the mode of these stages is chosen based on many requirements, the main ones being a very linear response of the AGC control on the second gate and a soft noise mode of the amplifier. For the same reasons of maintaining linearity, the author used KP350 transistors in the UFC, and not the "exotic" BF981, which have a short control characteristic for the second gate, although they have better noise parameters. Between the third (VT4) and fourth (VT10) stages of the IF, filters ZQ1 (SSB) and ZQ2 (CW) are included. When receiving a signal, they work as the second FOS, and when transmitting, they work as the main ones that form the signal. Filters are switched by relay contacts K1 and K2. The circuit and parameters of the ZQ1 filter are identical to the ZQ4 filter in node A4 - 1. The narrow-band quartz filter for telegraph operation ZQ2 is made according to the circuit shown in fig. 9 and has the following characteristics:
The output resistance of the cascade on the transistor VT4 and the input resistance on VT5, VT10 are approximately equal to 5 kOhm. The low input and output impedances of the ZQ1, ZQ2 filters are matched to these stages using reactive links (P - circuits) L8 - L11, C23 - C30. This matching option made it possible to sharply reduce the attenuation in the filters. From the load of the last stage of the IF, the L4L5 circuit, the signal comes to the key detector, the VT12 transistor. The reference frequency signal is fed to the gate of the transistor through pin 8 from node A6. The low-frequency signal isolated in the detector, through the C57L15C58 low-pass filter, comes to the first ULF stage, made on transistors VT13, VT14, and then through the capacitor C61 to the output of the node, pin 7. This stage should be emphasized. Since all signal conversion and processing in the A4 node occur at low levels (from 0,1 to 300 μV), the transceiver's bass amplifier has a very high sensitivity and a large gain, approximately + 74 dB. And here, in turn, interference problems arise. The cascade on transistors VT13, VT14 is called a composite complementary Shiklai emitter follower. It has remarkable characteristics for our case. Its transmission coefficient is close to unity throughout the entire low frequency range, the input impedance is about 1 MΩ, but the output is only 1,5 Ω, i.e. it does not load the amplifier stage following it. Amazing! It turns out that the signal safely goes into the main ULF, and what interference can there be if the signal source has Rout = 1,5 Ohm, or in other words, the ULF input is shorted! In the transmission mode, the signal coming from the A6 DSB or CW node is fed (through pin 10) to the switched cascade on the VT8 transistor. The operation of the cascade is controlled by a key on the transistor VT9. Then the signal passes through one of the filters: either ZQ1 with SSB signal extraction or narrow-band CW ZQ2. The resonant cascode amplifier based on transistors VT5, VT6, following the filters, has a low input capacitance, good input / output decoupling, and a Ku of about 16 dB. On the transistor VT7 - a key that controls the operation of the cascade during transmission. The signal comes to the mixer board A4 - 1 from the coupling coil L7 of the cascode amplifier. When transmitting, one of the filters of only node A4 - 2 is used. An attempt to work on transmission with the filters of two nodes connected in series was not reflected in the design of the transceiver due to the signal being poorly read by the correspondents. The cascade on the VT11 transistor is designed to listen to the signal during transmission. The level of the listener signal is regulated by applying a control voltage to the second gate of the transistor through pin 9 of the node. The signal is taken from the coupling coil L7 of the output stage of the transmitting path of node A4 2 through capacitors C40 and C53. The chain VD2 - VD4, R20, C32, C3Z, L12, as well as the VD5 diode, make it possible to completely decouple power-switched stages, eliminate switching noise, especially in stages containing an inductance of more than 100 μH. Node A5. The main ULF and AGC The low-frequency signal from the output of node A4-2 is fed to the input of node A5 at pin 1 (Fig. 10).
The first ULF stage is made on the DA1 chip (KR538UNZA), a low-noise amplifier specially designed to work with low-resistance audio signal sources. In the applied typical switching option, the microcircuit provides signal amplification up to +47 dB. The cascade following it on transistors VT1 and VT2 (the emitter follower of Shiklai already familiar to us) does not load it. From the output of the repeater, the signal goes to the low-pass bandpass filter L1-L5C11-C15, which selects the frequency band from 250...300 Hz to 3500...4000 Hz with attenuation at the edges better than 30 dB. In other words, it turns out something similar to the EMF, but only in the low frequencies. Such characteristics of the filter are obtained only with exact matching of its input and output impedance equal to 204 Ohm, and the tolerance value of the LC filter elements is less than 5% [4]. The filter input is connected to the cascade on the transistors VT1, VT2 through a series-connected resistor R5 of 200 ohms, and given that the Rout of the emitter follower is 1,5 ohms, then the matching is almost perfect! A load resistor R6 is also included at the filter output. After the filter, through the normally closed contacts of relay K1, the signal (point A in Fig. 10) enters the inputs of the two-channel low-frequency signal switch - the DA4 microcircuit. There, in the transmission mode, a telegraph signal self-control signal is supplied from node A6. Switching of the switch occurs when a control signal is applied to pin 4 from node A7 of the transceiver, i.e., when switching from reception to transmission. From the output of channel 1 of the DA4 microcircuit, the signal is fed to the input of the AGC amplifier (point B). From the output of channel 2 - to the input of a power amplifier (point C), made according to a typical switching circuit on a DA5 chip. At the PA input, a remote volume control is installed, made on an optocoupler U1. Despite the shallow control range, this option is a good alternative to the classic potentiometer with its long connecting wires and often a source of interference and background. To increase selection when receiving telegraph and digital signals, an active low-pass filter is installed in node A5, made on DA2 and DA3 microcircuits. The filter bandwidth for -6 dB and -20 dB levels is 240 and 660 Hz, respectively. This is quite enough even for PSK operation, given that the A4-2 node also has a quartz filter with a band of 800 Hz. The filter is connected to the low-frequency path circuit by relay contacts K1 (K1.1 and K1.2) when voltage +2 V is applied to output 15 of the node. In principle, dual potentiometers can be installed in the active filter in order to change its tuning frequency within small limits or, having slightly complicated the circuit, make a notch, similar to the "Mot.sp" filter [1,2]. The AGC amplifier is made on transistors VT3-VT8. The signal, amplified by cascades on VT3VT4, through voltage doubling detectors and an "AND" element made on VD3-VD7 diodes, charges two RC circuits with different time constants - R18C36 and R19C35. In the DC amplifier on the VT5VT6, the AGC control signal is generated. The construction resistor R7 at the input of the amplifier is used to set the level of AGC operation. The author in the transceiver has this level - about 2 μV. The construction resistor R22 regulates the slope of the control characteristic of the AGC system. Transistor VT5 should not be used with high slope. The voltage across the resistor R21 at the source of the transistor must not exceed 1,2 V (reference for control). The control voltage of the AGC is removed from the collector of the transistor VT6, and an S-meter is connected to the emitter of the transistor. Cascades on transistors VT7 and VT8 provide a small delay to establish transients during the transition from reception to transmission and vice versa. Practical tests of the AGC showed the following results: when the signal at the transceiver input changed from 2 μV to 1 V, the output signal changed by no more than 5 dB, and with more careful tuning - by no more than 3 dB. The AGC adjustment range was about 114 dB, which is quite enough for a good receiving path. It is advisable to introduce a 1 Ohm resistor into the base circuit of the transistor VT6 (Fig. 560), connecting it between the base terminal and the common wire. This will further simplify the setting of the quiescent current of this transistor. The transmitting path of the transceiver starts from node A6, which is structurally divided into two parts - nodes A6-1 and A6-2. To increase the efficiency of signal transmission in SSB mode, the transceiver uses a signal limiter, the so-called "speech" processor, which allows increasing the average power of the SSB signal by 4...6 times (6...8 dB). When conducting a DXQSO or under QRM (QRN) conditions, a limited signal has higher quality and good intelligibility. Node A6-1 is such a device, connected between the microphone and the DSB driver of the transceiver. Schematic diagram of the node is shown in Fig.11.
The audio signal from the microphone is fed to pin 1 of the node. Then, through capacitor C2 and a level regulator (a variable resistor connected between terminals 2 and 3 of node A6-1), the signal is fed to a microphone amplifier made on the DA1 chip. An electret microphone is used with the transceiver, and the R1 - R3C1 chain provides power to it. The low-pass filter L1C4 attenuates high-frequency interference from its own transmitter to the input of the microphone amplifier and thereby reduces the risk of its self-excitation. The contacts of relay K1 switch the amplifier correction circuits to raise the frequency response in the region of 300 ... 3000 Hz up to +16 dB. The level of the output low-frequency signal of the amplifier (150 ... 200 mV) is set with a trimming resistor R9. Through the emitter follower on the transistor VT1, the signal enters the limiter circuit developed by B. Larionov (UV9DZ) [5]. Transistor VT5 is the first key RF limiter mixer. The VT5 gate receives a signal with an amplitude of about 0,7 V from a reference quartz oscillator made on transistors VT3-VT4. The L2C25 circuit in the VT5 source circuit is tuned to a frequency of 500 kHz. The single-sideband signal selected by the ZB1 electromechanical filter is fed to a limiting amplifier made on a VT6 field-effect transistor and VD3VD4 diodes. The degree of limitation is defined as the ratio of the RF voltage at the drain of the transistor VT6 with the diodes VD3VD4 off to the voltage at the same point after the diodes are connected. This value is 7...8 dB. The trimmer resistor R24 sets the gain of the cascade to VT4, which maintains the optimal level of the SSB signal with a minimum of limitation. This is important when comparing a radio's transmit signal at the minimum and maximum clipping levels. To suppress the increased number of harmonics and combination frequencies, the signal is passed through a second EMF ZB2, identical to the first. The cascade on the field-effect transistor VT7 (Ku = 6 ... 10 dB) compensates for attenuation in the filters, but with good EMF it may not be installed. A limited single-sideband signal is fed to the second key mixer-detector on a VT8 field-effect transistor, the gate of which is also supplied with a 500 kHz reference oscillator signal. The detected and filtered signal is amplified by the operational amplifier on the DA2 chip and fed through the emitter follower on the VT2 transistor to the A6-2 formation unit. The output signal level of the speech processor is set by the tuning resistor R35. Relays K2 and short circuit make it possible to exclude the speech processor from the transmitting path. This option may be required when making local QSOs, since the signal level at the receiving point is often high and the restriction can reduce its intelligibility. The diagram of the A6-2 node, the DSB and CW signal voltage driver, is shown in fig. 12.
The reference quartz oscillator of the upper band is made on VT1VT2 transistors. The inductor L1, connected in series with the quartz resonator ZQ1 (8862,7 kHz), allows you to fine-tune the generator to the frequency corresponding to the -20 dB level point on the lower slope of the frequency response of the main selection filter. From the emitter of transistor VT2, the reference oscillator signal is fed through a buffer amplifier on transistor VT3 to a balanced modulator made on VD2VD3 varicaps and transformer T1. Also, the signal from the emitter VT2 through the output 2 of the node is fed to the node A4-2 to the key detector. The modulator has a high linearity and allows you to suppress the carrier by at least 56 dB (repeatedly verified by the author). The modulator is balanced using trimming resistors R20 and R24. Through the amplifier on the transistor VT8 (Ku = 6 dB), the voltage of the audio frequency signal from node A6-1 is applied to the midpoint of the primary winding of the transformer of the balanced modulator. The cascade works only when the supply voltage is applied to terminals 15 and 16 from the transceiver operation mode switch. In the same circuit, relay K1 is installed, which, with its contacts, connects the output of the balanced modulator to the transmission path. From the trimmer resistor R50 in the VT8 emitter circuit, the AF signal is fed to the VOX circuit located at node A7. A manipulated CW signal crystal oscillator is made on the VT9 transistor. The frequency of the quartz resonator ZQ3 8863,5 kHz) is higher than the frequency of the ZQ1 resonator by 800 Hz, i.e. it falls into the transparency band of the main selection filter of the transceiver. The CW generator is controlled through the base circuit of the transistor VT9 through resistors R43, R44 using a key circuit located in node A7, which forms the necessary rise and fall time parameters of the telegraph signal, equal to 5 and 7 ms, respectively. Depending on the type of operation of SSB or CW, a signal is supplied to the base of the transistor VT4 through the contacts of relay K1 either from a balanced modulator or from a telegraph local oscillator. An adjustable DSB and CW transmitter signal amplifier is assembled on the VT3 transistor. The cascade gain is adjusted by changing the voltage at the second gate of the transistor from the manual signal power regulator (through terminal 5 of node A6-2) and from the ALC control circuit made on the VT10 transistor. The cascade load is the L4L5C26 circuit tuned to the IF frequency. An output signal with a level of about 5 V is taken from the coupling coil L1, which is fed to the IF preamplifier and the main selection filter in block A4-2. The reference oscillator on VT6VT7 transistors is used to listen to the reverse band. The frequency of its quartz resonator ZQ2 (8865,8 kHz), corresponding to the -20 dB point on the upper slope of the FOS frequency response, is fine-tuned by capacitor C45. On the DA1 chip, an RC tone generator is assembled for signal self-monitoring when working by telegraph and for setting up the transceiver in SSB mode (mode of operation - "TUNE"). The signal of this generator with a frequency of 800 Hz and a level of about 50 mV is fed through terminal 11 of the node to the ULF transceiver, node A5. You can reduce or increase the signal level by selecting the resistor R60. When working as a telegraph, the tone generator is turned on by supplying positive parcels along the "TX / KEY" circuit synchronously with the generator on VT9. When tuning the transmitter in SSB ("TUNE") mode, the tone generator signal is fed through an external divider and switching circuits to the microphone input of node A6-1. Node A7 controls the transceiver to transmit mode using the VOX voice control device or by pressing the telegraph key or pedal. The node diagram is shown in fig. 13.
In the receive mode, the supply voltage of +15 V, constantly applied to pin 11 of the node, is present only at the output of the controlled key on transistors VT13 and VT14, pin 13 (RX). The input of the VOX system (pin 1 of node A7) is connected to the output of the microphone amplifier of the transceiver (pin 7 of node A6-1). Work with VOX is possible when applied to pin 3 of node A7 through the corresponding +15 V supply voltage switch. Amplified by a cascade on transistor VT1, the AF signal is fed to a limiting amplifier made on transistor VT2. The signal limiting voltage, or, in other words, the threshold for the operation of the VOX system, is set by a tuned resistor R4. A limited signal is detected by diodes VD1, VD2 and with a level of more than two volts is fed to the timing chain C7R9. Trimmer resistor R9 sets the delay time for the operation of the voice control system within 0,2 ... 2 s. Further, this signal starts a single-vibrator made on transistors VT5, VT6, and through the inverting cascades on transistors VT7, VT8, the key cascade on VT13 and VT14 closes, and the cascade on transistors VT11, VT12 opens and a voltage of + 12 V appears at terminal 15 of the node (TX). The voltage from this output is supplied to the transceiver circuits operating in transmit mode. If there is no signal from the microphone amplifier after a time determined by the C7R9 RC circuit, these key stages go into the "reverse" state, +13 V (RX) appears at pin 15, and the voltage at pin 12 becomes zero. To prevent the transmission mode from being switched on by sounds entering the microphone from the transceiver speaker, an "anti-VOX" device is made on transistors VT3, VT4, blocking the operation of VOX for as long as the signal of the correspondent is present. The "anti-VOX" input (pin 2 of node A7) is connected to the ULF output. The signal from the ULF is amplified by the transistor VT3, rectified by the diodes VD3, VD4 and charges the capacitor C14. The key stage on the transistor VT4 shunts the main timing circuit of the VOX - C7R9 system. Trimmer resistor R10 sets the threshold for the "anti-VOX" system. Cascades made on transistors VT9 and VT10 control the switching of the transceiver to transmission, respectively, from the telegraph key (KEY) or from the pedal (PTT). The control scheme in CW mode allows "half duplex" operation. When you press the telegraph key (pin 8), a constant voltage appears on the collector of the VT9 transistor (pin 6, circuit TX / KEY), which, through the R32C19VD5 chain, starts the one-shot to VT5, VT6 and then switches the key stages through the circuit. The pause time in CW mode is determined by the value of the tuning resistor R18, connected in parallel with the resistor R9, and can be 0,1 ... 0,6 s, providing listening to the correspondent's signal during these pauses. This mode is convenient when working in tests. To work without pauses in CW mode, it is enough to press the pedal for the duration of the transmission. When the VOX system is off, switching to transmission in SSB mode is also carried out by the pedal. The control signal from the pedal (PTT) from the key output on the VT10 transistor through the R36C22VD6 circuit is fed to the input of the single vibrator. In the transceiver tuning mode (TUNE), +5 V is supplied to pin 7 of node A15, which is also fed through the R40C25VD7 circuit to the input of the one-shot, ensuring the transition of the transceiver to transmission. The key stage on transistors VT15 and VT16 is used to control the short circuit antenna relay in node A2. The transceiver range switch node A9 is made according to the diagram shown in fig. 14. When you turn on the power of the transceiver, the 1,8 MHz band is automatically turned on.
On the DD1 chip, an oscillator with a clock frequency of about 1 Hz is assembled, the signal of which is fed to the input of the clock pulses of the reversible counter, the DD2 chip. The direction of sequential counting is controlled through external switching circuits (buttons DOWN and UP), which are connected to terminals 2 and 3 of node A9. The output binary-coded decimal code of the counter DD2 is converted into a decimal code using a decoder - chip DD3. Control keys on transistors VT3 -VT1 are connected to the outputs of the DD18 microcircuit, through which the supply voltage to the range switching relay is supplied to the nodes A1, A3, A8, A10 and A11. The local oscillator of the transceiver is made on the basis of an industrial VHF generator (node A12) and a frequency divider with a variable division ratio (node A8-1). Before entering the transceiver mixer, the signal is pre-filtered in the A8-2 node. To ensure high stability of the local oscillator frequency when working with digital modes, the transceiver uses a frequency-locked loop (FLL) frequency stabilization system, node A10. Node A12 - smooth range generator from HF-VHF radio station R-107M. Its schematic diagram is shown in fig. 15. The operating frequency range of the generator is 30,15 ... 63,7 MHz. The generator is a hermetically sealed unit, it is not recommended to open it and make any changes in its circuit so as not to violate its frequency-time characteristics.
The drift of the GPA frequency, set by the author in the transceiver, using passive temperature control, did not exceed 50 Hz at any frequency after a 15-minute warm-up. The diagram of the A8-1 node, a divider with a variable division ratio, is shown in fig. 16. The signal from the R107M generator is fed to the input of the shaper, made on transistors VT1, VT2 and the DD1 microcircuit. The first element of the D1.1 chip operates in linear mode as an amplifier.
From the shaper, the signal is fed to the microcircuits DD2 and DD3 - a three-bit binary frequency divider. Depending on the included range of the transceiver, the choice of the division ratio of the divider (2-4-8) is determined by the relay switch K1-KZ and the logical switch on the DD4 chip. The frequency spectrum of the local oscillator obtained at the output of the DPKD at Fp equal to 8,862 MHz, depending on the operating range, is given in Table. 1.
The adder and buffer stages are made on the DD5 chip. From the output of the first element DD5, the signal is fed to the input of the frequency stabilization system FLL (through pin 11 of node A8-1), from the output of the second element to the input of the digital scale (pin 12 of the node). The local oscillator signal for the transceiver's first mixer should be as clean and monochrome as possible. To do this, the rectangular signal after the element DD5 3 using the chip DD6 and transformer T1, operating as a forming circuit, is converted into a sinusoidal signal. The broadband amplifier based on the VT3 transistor has a gain of about +14 dB and a uniform frequency response up to a frequency of 40 MHz. The cutoff frequency of the L1C14C15C16L2 low-pass filter is 25 MHz. At frequencies of 19 ... 20 MHz, the output of node A8-1 should be a pure sinusoid with an amplitude of 200 ... 250 mV at a load of 50 ohms. On ranges where the frequency is lower, there will be distortion of the sinusoid and an increase in its amplitude. The diagram of the FLL frequency stabilization device (node A10) is shown in fig. 17.
The GPA signal is fed to a line of binary counters of the DD1 and DD2 microcircuits with varying division ratios (M). The required division factor DD1 is selected using the relay K1-K4. The division coefficients of the DD2 counter are chosen constant: 1024 and 4096. A digital mixer is made on the DD3 chip. The input D of the DD3 chip is supplied with a reference frequency signal from a 4 MHz DD50 crystal oscillator. The clock frequency is applied to the input C of the DD3 chip, i.e. the frequency of the GPA, divided by the number M with the help of DD1 and DD2. Correction pulses, which are taken from the output Q12 of the DD2 microcircuit, are fed to the transistor switch VT2. This frequency differs by two binary orders and is taken from the same DD2 from the output of Q10. The keys VT1 and VT2 control the operation of the integrator, made on the DA1 chip. From the output of the integrator, the control voltage is supplied to the GPA varicap. The scheme is borrowed from [6], but differs from the original source in some modifications. In particular, at the output of the first binary counter of the DD1 chip, a relay switch is installed for selecting the division ratio depending on the operating range of the transceiver. The DD3 digital mixer uses a high-speed 74AC74 chip, and the key transistors VT1 and VT2 are replaced with higher-frequency ones. Also, an additional operational amplifier DA2 was introduced into the device. Half of the DA2.1 op-amp has an adder whose task is to reduce the control voltage swing at the output of the integrator DA1 relative to the reference voltage of +7,5 V. If at the output of the DA1 chip, at the connection point of resistors R7 and R15, the control voltage can vary within 0 +11 V, then at the DA2 output this voltage will already be +5,5 ... 9,5 V. This is done in order not to open the hermetically sealed GPA from R-107M and not to select capacitor C9 with a nominal value of 270 pF, connected in series with varicap VD1. The lower limit of the control voltage should not be less than +5,5 V, since a bias voltage of the same value has already been applied (internally) to the varicap in the GPA R-107M (see Fig. 15). The ratio of the values of the resistors R14 and R15 determines the limits of the output voltage change and can be selected for a specific instance of the generator from R-107M. The inverter, made on DA2.1, allows you to save the polarity of the control voltage relative to the output of DA1. As a source of exemplary frequency DD4, an integrated crystal oscillator СХО-43В was used at a frequency of 50 MHz from an old computer with a TTL output level. Conclusions 14 and 15 of node A10 are interconnected through an external switch (for example, a push-button) located on the front panel of the transceiver next to the tuning knob. When the switch is closed, the transceiver is tuned; when the switch is open, the frequency is captured. With the values of resistors R5 and R12 indicated in the diagram, the time of a full cycle of the DA1 integrator (from the minimum to the maximum output voltage level) is 50 ... 60 s. This corresponds to an oscillator with low frequency drift (stickout). If the GPA has a drift time of more than 600 Hz / min (there are also such specimens, apparently with a violation of sealing or subjected to shock loads), the ratings of R5 and R12 should be reduced to 1 MΩ, i.e. dramatically reduce the cycle time of the integrator to a few seconds. For the operation of SSB and CW, the FLL stabilization system may not practically be used, and it should be turned on only for digital modes of communication. The accuracy of holding the captured frequency during the operation of the P1_1_ system is better than ± 10 Hz for several hours. Node A8-2 (Fig. 18) contains 5th order low-pass filters that serve to improve the spectral purity of the transceiver local oscillator signal. Filter cutoff frequencies: L1C1-C3L2 - 6 MHz; L3C4-C6L4 - 11,3 MHz; L5C7-C9L6 - 13,5 MHz; L7C10-C12L8 - 17 MHz. The LPF of the 10 and 28 MHz ranges is located on the DPKD board, and a matching attenuator is connected instead of it in the A8-2 node. At the output of node A8-2, the amplitude and shape of the signal (sinusoid) correspond to the norm at all operating frequencies of the local oscillator.
Relay K1 and K2 - local oscillator switch (main or auxiliary). The digital scale of the transceiver, node A11 (Fig. 19), does not have any features, and its circuit and design may be different from those proposed.
The second GPA of the transceiver, node A13, is made according to the scheme shown in fig. 20. A similar option was once used in the previous developments of the author, for example, in the "Largo-91" transceiver. And it was with such a GPA that the main parameters of the transceiver were measured. Installing a second GPA in the transceiver is not necessary, but can be carried out as an alternative in the absence of a generator from the R-107M (hardly enough for everyone!).
The GPA consists of six generators identical in circuitry, but differing from each other in the parameters of the frequency-setting circuits and the absence of a resistor in the emitter circuit of the buffer stage transistors. Resistor R11 is common to all six generators. The generators are rebuilt with a six-section variable capacitor. On fig. 20 shows a diagram of one of the six generators. The ratings of resistors and capacitors for each generator are given in table. 2.
The generators are switched by applying a supply voltage of +5,6 V to terminals 2-7 of node A13. The generator output should be connected to the A8-2 node through a low-pass filter, similar to L1C14C15C16L2 on the DPKD board. The digital scale, as in fig. 19. The FLL system is also suitable for the second GPA, but the DA2 microcircuit should be excluded from the circuit, and the control signal for the GPA detuning varicaps should be removed from the connection point of the resistor R7 and capacitor C12. Literature
Author: Kir Pinelis (YL2PU), Daugavpils, Latvia. Memory YL2HS
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