On the inclusion of electric motors in a single-phase network. Encyclopedia of radio electronics and electrical engineering

Encyclopedia of radio electronics and electrical engineering / Electric motors

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During my life, I have connected at least 50 three-phase electric motors (EM) to a single-phase network. I will not dwell on the features: everything has been described a long time ago. I do not advise, like some of the authors, to pull the string and spin the ED shaft - this is not European.

I quite easily included three-phase motors 4 kWh 1500 rpm and 2,2 kWh 3000 rpm in a single-phase network. At the same time, electrolytic capacitors with a rated voltage of 350 ... 400 V were used as a starting capacitance. They say that they can explode. Yes I know. In our student years, we included electrolytic capacitors in the 220 V network, they exploded very effectively and scared the girls a lot. However, as a starting capacitance, electrolytic capacitors work reliably for many years. Still, they need to be securely hidden in boxes in case they explode!

It should be noted that when connected to a single-phase network, three-phase electric motors lose about 50% of their power. To increase it, you need to connect working capacitors, and be sure to be non-polar. Such capacitors are scarce and expensive. When I did not have them, I used electrolytic capacitors, according to the diagram in Fig. 1, published in the Radio magazine back in the 60s.

The maximum allowable current of the diodes VD1 and VD2 depends on the power of the ED:

Ipr.max≥2Rel.motor/220.

And yet I urge you to actively engage in the design of three-phase inverters. The proposed scheme of the control system of the three-phase voltage converter from DC is shown in Fig.2.

The timing reference frequency ft must be chosen to be 6 times greater than the required three-phase sequence frequency. The K155IE4 counter generates a sequence of pulses A, B and C. After three EXCLUSIVE-OR elements, the output sequences F1, F2, F3 have an accurate and constant phasing with a mutual shift of a third of the period.

In my article [1], a ring counter-divider by 6 is used in the control system. An unpleasant feature of such counters is that failures caused by extra or missing code units in the ring are not self-correcting. Indeed, if, for example, under the influence of an interference pulse, the trigger that was in the log. "1" state goes to "0", then all triggers in the ring will be in the zero state, and the counting pulses will not change the state of the counter. Such failures can only be corrected by re-initializing the counter triggers. Ring counters are easily built on shift registers, but the disadvantage is the same as in a counter built on flip-flops.

One of the methods of dealing with such failures is to introduce a logic circuit into the counter that allows writing a unit to the first flip-flop only when all other flip-flops are at zero. Such a ring counter has a conversion factor of one greater than the number of digits of the counter used.

Based on the above, I had to invent my personal ring meter for the control system of a three-phase inverter, shown in Fig. 3.

The operation of the counter is explained by the time voltage diagram shown in Fig. 4.

In the initial position, the RS-flip-flop DD1 is in a single state, all other D-flip-flops (DD2-DD6) are in the zero state. With the arrival of the first clock pulse, the flip-flop DD2 goes into a single state (log "1" at its information input), all other D-flip-flops (DD3-DD6) remain in the zero state, since there is a log at their information inputs. "0 ".

At one of the inputs of the circuit "OR-NOT" DD6 will appear the level log. At the input R of the same trigger set log. "1" (after the inverter DD1). Naturally, trigger DD0 will be set to the zero state. The second clock pulse will set the DD1 trigger to a single state, all other triggers will be in the zero state, and so on. The sixth clock pulse will set the trigger DD7 to a single state, all the rest will be in the zero state, i.e. the ring counter will be in its initial state - 1.

If, due to the impact of the interference pulse, all triggers are in the zero state, the output DD6 will be set to log. "1", the output DD7 - log. "0", the input S of the trigger DD1 - log. "1", the input R - log. "0" and the trigger DD1 will almost instantly be set to a single state, i.e. the ring counter will take its initial state - 1,0,0,0,0,0, even in the improbable case when, due to interference, all 6 triggers are set to log. "1", then almost instantly trigger DD1 will be set to log. "0 ". Then, as clock pulses appear, the rest of the triggers, except for the 0th, will be set to "6", and the operation algorithm will be restored.

A schematic diagram of the control of a three-phase current inverter is shown in Fig.5.

(click to enlarge)

References:

1. Shilo V.L. Popular digital circuits: Ref. Moscow: Radio and communication, 1989.
2. Mankovsky A.N. Converter of battery voltage into three-phase voltage 380 V//Elektrik. - 2001. No. 7. - P.4-5.

Author: A.N. Mankovsky

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