1. Features of IP

ION and undervoltage protection circuits. The circuit turns on when the power supply reaches the threshold of 5.5..7.0 V (typical value 6.4V). Up to this point, the internal control buses disable the operation of the generator and the logic part of the circuit. No-load current at +15V supply voltage (output transistors disabled) no more than 10 mA. ION +5V (+4.75..+5.25 V, output stabilization not worse than +/- 25mV) provides outflow current up to 10 mA. It is possible to amplify the ION only using an npn-emitter follower (see TI pages 19-20), but the voltage at the output of such a "stabilizer" will strongly depend on the load current.

Generator generates on the timing capacitor Ct (pin 5) a sawtooth voltage of 0..+3.0V (amplitude set by ION) for TL494 Texas Instruments and 0...+2.8V for TL494 Motorola (what can we expect from others?), respectively for TI F =1.0/(RtCt), for Motorola F=1.1/(RtCt).

Permissible operating frequencies are from 1 to 300 kHz, while the recommended range is Rt = 1 ... 500 kOhm, Ct = 470 pF ... 10 μF. In this case, the typical temperature drift of the frequency is (of course, without taking into account the drift of attached components) +/-3%, and the frequency drift depending on the supply voltage is within 0.1% in the entire allowable range.

To remotely turn off the generator, you can use an external key to close the Rt input (6) to the ION output, or - close Ct to the ground. Of course, the leakage resistance of the open switch must be taken into account when choosing Rt, Ct.

Rest phase control input (duty cycle) through the rest phase comparator sets the required minimum pause between pulses in the arms of the circuit. This is necessary both to prevent through current in the power stages outside the IC, and for the stable operation of the trigger - the switching time of the digital part of the TL494 is 200 ns. The output signal is enabled when the saw on Ct exceeds the voltage at control input 4 (DT). At clock frequencies up to 150 kHz at zero control voltage, the rest phase = 3% of the period (equivalent control signal offset 100..120 mV), at high frequencies, the built-in correction extends the rest phase to 200..300 ns.

Using the DT input circuit, it is possible to set a fixed rest phase (RR divider), soft start mode (RC), remote shutdown (key), and also use DT as a linear control input. The input circuit is made up of pnp transistors, so the input current (up to 1.0 uA) flows out of the IC and does not flow into it. The current is quite large, so high-resistance resistors (no more than 100 kOhm) should be avoided. See TI, page 23 for an example of surge protection using a TL3 (430) 431-pin zener diode.

Error Amplifiers - in fact, operational amplifiers with Ku=70..95dB DC voltage (60 dB for early series), Ku=1 at 350 kHz. The input circuits are assembled on pnp transistors, so the input current (up to 1.0 µA) flows out of the IC and does not flow into it. The current is large enough for the op-amp, the bias voltage is also (up to 10mV), so high-resistance resistors in control circuits (no more than 100 kOhm) should be avoided. But thanks to the use of pnp inputs, the input voltage range is from -0.3V to Vsupply-2V.

The outputs of the two amplifiers are combined by a diode OR. The amplifier, at the output of which there is a greater voltage, intercepts the control of the logic. In this case, the output signal is not available separately, but only from the output of the diode OR (it is also the input of the error comparator). Thus, only one amplifier can be closed by the feedback loop in linear mode. This amplifier closes the main, linear OS in terms of output voltage. In this case, the second amplifier can be used as a comparator - for example, for exceeding the output current, or as a key to a logical alarm signal (overheating, short circuit, etc.), remote shutdown, etc. One of the inputs of the comparator is tied to the ION, the second OR alarms (even better - logical AND signals of normal states).

When using an RC frequency-dependent OS, it should be remembered that the output of the amplifiers is actually single-ended (serial diode!), So charging the capacitance (up) will charge it, and down - it will take a long time to discharge. The voltage at this output is in the range of 0..+3.5V (a little more than the amplitude of the generator), then the voltage coefficient drops sharply and at about 4.5V at the output the amplifiers saturate. Likewise, low-resistance resistors should be avoided in the output circuit of amplifiers (OS loops).

Amplifiers are not designed to operate within one cycle of the operating frequency. With a signal propagation delay inside the amplifier of 400 ns, they are too slow for this, and the trigger control logic does not allow (there would be side pulses at the output). In real PN circuits, the cutoff frequency of the OS circuit is selected on the order of 200-10000 Hz.

Trigger and output control logic - With a supply voltage of at least 7V, if the saw voltage on the generator is greater than on the control input DT, и if the saw voltage is greater than on any of the error amplifiers (taking into account the built-in thresholds and offsets), the output of the circuit is allowed. When the generator is reset from maximum to zero, the outputs are disabled. A trigger with a two-phase output divides the frequency in half. With a logical 0 at input 13 (output mode), the trigger phases are combined by OR and are fed simultaneously to both outputs, with a logical 1, they are fed paraphase to each output separately.

Output transistors - npn Darlingtons with built-in thermal protection (but no current protection). Thus, the minimum voltage drop between the collector (usually closed to the positive bus) and the emitter (at the load) is 1.5V (typical at 200 mA), and in a common emitter circuit it is slightly better, 1.1V typical. The maximum output current (with one open transistor) is limited to 500 mA, the maximum power for the entire crystal is 1W.

2. Application features

Work on the gate of the MIS transistor. Output repeaters

When operating on a capacitive load, which is conventionally the gate of an MIS transistor, the output transistors TL494 are turned on by an emitter follower. When the average current is limited to 200 mA, the circuit is able to charge the gate fairly quickly, but it is impossible to discharge it with the switched-off transistor. Discharging the gate with a grounded resistor is also unsatisfactorily slow. After all, the voltage on the conventional gate capacitance decreases exponentially, and to close the transistor, the gate must be discharged from 10V to no more than 3V. The discharge current through the resistor will always be less than the charge current through the transistor (and the resistor will heat up quite well, and steal the key current when moving up).

Option A. Discharge circuit through an external pnp transistor (borrowed from Shikhman's website - see "Jensen amplifier power supply"). When the gate is charging, the current flowing through the diode turns off the external pnp transistor, when the IC output is turned off, the diode is turned off, the transistor turns on and discharges the gate to ground. Minus - works only on small load capacities (limited by the current reserve of the output transistor of the IC).

When using the TL598 (with a push-pull output), the function of the lower, bit, shoulder is already hardwired on the chip. Option A does not work in this case.

Option B. Independent complementary repeater. Since the main current load is processed by an external transistor, the capacity (charge current) of the load is practically unlimited. Transistors and diodes - any HF with a small saturation voltage and Ck, and a sufficient current margin (1A per pulse or more). For example, KT644 + 646, KT972 + 973. The "ground" of the repeater must be soldered directly next to the source of the power switch. The collectors of the repeater transistors must be shunted with a ceramic capacitance (not shown in the diagram).

Which circuit to choose depends primarily on the nature of the load (gate capacitance or switching charge), operating frequency, and timing requirements for pulse fronts. And they (the fronts) should be as fast as possible, because it is on transients on the MIS key that most of the heat losses are dissipated. I recommend that you turn to publications in the International Rectifier collection for a complete analysis of the problem, but I myself will limit myself to an example.

A powerful transistor - IRFI1010N - has a reference total gate charge Qg=130nC. This is a lot, because the transistor has an exceptionally large channel area in order to provide an extremely low channel resistance (12 mΩ). It is these keys that are required in 12V converters, where every milliohm counts. To guarantee the opening of the channel, the gate must be provided with Vg = + 6V relative to the ground, while the total gate charge Qg (Vg) = 60 nC. To guarantee discharge of the gate charged up to 10V, it is necessary to absorb Qg(Vg)=90nC.

With a clock frequency of 100 kHz and a total duty cycle of 80%, each arm operates in the 4 µs open - 6 µs closed mode. Let us assume that the duration of each pulse front should be no more than 3% of the open state, i.e. tf=120 ns. Otherwise, heat losses on the key increase sharply. Thus, the minimum acceptable average charge current Ig+=60nC/120ns=0.5A, discharge current Ig-=90nC/120ns=0.75A. And this is without taking into account the non-linear behavior of the gate capacitances!

Comparing the required currents with the limits for the TL494, it is clear that its built-in transistor will operate at the current limit, and most likely will not cope with the timely gate charge, so the choice is made in favor of a complementary follower. With a lower operating frequency or with a lower capacitance of the key gate, a variant with a spark gap is also possible.

2. Implementation of current protection, soft start, duty cycle limitation

As a rule, in the role of a current sensor, a series resistor in the load circuit is asked for. But he will steal precious volts and watts at the output of the converter, and he will only control the load circuits, and he will not be able to detect short circuits in the primary circuits. The solution is an inductive current sensor in the primary circuit.

The sensor itself (current transformer) is a miniature toroidal coil (its inner diameter, in addition to the sensor winding, must freely pass the wire of the primary winding of the main power transformer). Through the torus we pass the wire of the primary winding of the transformer (but not the "earth" wire of the source!). We set the rise time constant of the detector to be about 3-10 cycles of the clock frequency, the decay time constant is 10 times more, based on the optocoupler operation current (about 2-10 mA at a voltage drop of 1.2-1.6V).

On the right side of the diagram - two typical solutions for TL494. Divider Rdt1-Rdt2 sets the maximum duty cycle (minimum rest phase). For example, at Rdt1=4.7kOhm, Rdt2=47kOhm, at output 4 there is a constant voltage Udt=450mV, which corresponds to a rest phase of 18..22% (depending on the IC series and operating frequency).

When the power is turned on, Css is discharged and the potential at the DT input is Vref (+5V). Css is charged through Rss (aka Rdt2), smoothly lowering the DT potential to the lower limit, limited by the divider. This is a soft start. With Css=47uF and the specified resistors, the outputs of the circuit open 0.1 s after switching on, and reach the operating duty cycle for another 0.3-0.5 s.

In the circuit, in addition to Rdt1, Rdt2, Css, there are two leakages - the leakage current of the optocoupler (not higher than 10 μA at high temperatures, about 0.1-1 μA at room temperature) and the base current of the IC input transistor flowing from the DT input. So that these currents do not significantly affect the accuracy of the divider, we select Rdt2 = Rss no higher than 5 kOhm, Rdt1 - no higher than 100 kOhm.

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