A device for determining the conclusions, structure and current transfer coefficient of transistors. Encyclopedia of radio electronics and electrical engineering

Encyclopedia of radio electronics and electrical engineering / Measuring technology

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The proposed device is designed to determine the location of the collector, base and emitter terminals on the cases of low, medium and high power bipolar transistors, determine the structure (npn or pnp), as well as measure the current transfer coefficient in a circuit with a common emitter (p21E). For insulated-gate field-effect transistors with built-in and induced channel, the pin locations (drain, source, gate) and the type of channel conductance (n or p) are determined. Additionally, the device can be used as a DC voltmeter. All information is displayed on two LCD indicators.

Main Specifications:

In the determinant mode for bipolar transistors, the base current when measuring P21E
low-power, µA ......... 20
medium and large
power, mA................1
composite, mA......................0 1
Maximum measured value p21E
conventional .................1999
composite, thousand ....... 19,99
Lower measurement limit P21E
low-power ...............40
composite .................200
medium and large
power..................20
Time of determination, s, not
over ........................0,2
In the voltmeter mode, the limits of the measured direct voltage, V. .0,00...19,99
Input resistance, MΩ ..... 10
Supply voltage, V.....5 (four
Ni-MH battery size AA, AAA) Maximum current consumption (when measuring
p21e), A.......................2,2
Current consumption in standby mode or voltmeter, mA ..........................2

Fig. 1

The scheme of the device is shown in fig. 1. Indication of the outputs of bipolar transistors - collector, base, emitter - and field - drain, gate, source - is carried out on the HG2 LCD indicator with the symbols "C", "b", "E", respectively, and the state of uncertainty - with the symbols "b", "b", "b". The structure of bipolar transistors (npn or pnp) and the type of channel conductivity (n or p) of the field-effect transistor are indicated on the same indicator by the symbols "p" or "P", respectively.

Assignment of switches and buttons. In the "Comp." switch SA1 is testing composite transistors, in the "Normal." - conventional, for field-effect transistors, the switch position can be any. When you press the button SB1 "Power." transistors of medium and high power are tested, as well as field transistors with a built-in channel. In the "p21e" position of the SA2 switch, this parameter of bipolar transistors is measured, and in the "U" position, the device works as a voltmeter with a DC voltage measurement limit of 19,99 V. In the latter case, when you press the SB2 "Bat." the indicator HG1 shows the value of the supply voltage (battery).

The device consists of two main units - a voltmeter and a determinant of transistor outputs. The voltmeter is assembled on the ADC DD10 with information output to the LCD indicator HG1. The same indicator displays the value of p21E of the bipolar transistor. The supply voltage of -4,5 V ADC DD10 receives from a voltage converter assembled on a logic element DD1.1, an inverting rectifier based on diodes VD1, VD4, capacitors C5, C8, and a level converter DD3 - from a rectifier with voltage doubling on the elements VD2, VD3 , C6, C7 supply voltage 9,8 V. One of the inputs of the logic element DD1.1 is connected to the output of the master oscillator ADC DD10, operating at a frequency of 50 kHz.

From the BP output (pin 21) of the ADC DD10, rectangular pulses with a repetition rate of 62,5 Hz are fed to the input of the logic element DD7.2, and its output signal is the clock for the operation of the determinant. The pulses from the output of this element are fed to the elements D, E and F of the three most significant digits of the HG2 LCD indicator, which are displayed constantly, since they are not required to turn off when the characters "C", "b" and "E" are displayed. Voltage pulses from the output of the element DD7.2. 5.3 are also fed to the inputs of the elements DD5.4, DD2.4 and DD14.4, DD15.4, DD12.3, DD2, at the output of which, depending on the determinant signals, control signals are generated for elements A or C in those same digits and elements F, A and B in the least significant digit of the HGXNUMX LCD indicator.

From the output of the element DD5.3, clock pulses through the integrating circuit R21C12 are fed to the counter DD4 with a division factor of 128. Every 2 s, with the next drop in the input pulse, a high-level voltage appears at its output, from which the differentiating circuit R1C3 generates a reset pulse of the entire device to the original status and restart. Since the microcircuits of the 74AC series (domestic analogue of the KR1554 series) have short switching durations, which are unstable perceived by the counting inputs of the K561 series microcircuits and their analogues, integrating circuits R21C12 and R23C4 are introduced, increasing the rise and fall of pulses from the outputs of the elements DD5.3 and DD5.4 to 2 ms. Pulses from the R21C12 circuit are also sent to the COM output of the HG2 indicator, and through the exclusive OR elements DD8.1-DD8.4 - to the G elements in the three most significant and the E and G elements in the lower digits of the HG2 LCD indicator.

The transistor under test is connected with its outputs to the terminals XS1, XS2, XS3, which are connected to the outputs of a powerful three-channel switch assembled on field switching transistors VT1-VT4, VT8, VT9. The control signals for them are generated at the outputs of the elements of the DD3 level converter microcircuit, which are used as buffer elements. Three identical current-setting circuits of resistors R3 R5, R12R17R19 and R24R26R27 are connected to the outputs of a powerful switch, switched by a low-power, also three-channel, switch assembled on keys DD13.1-DD13.4, DD16.3, DD16.4.

The determination of the conclusions is carried out by periodically changing the state of the outputs of a powerful switch - the combination of open and closed transistors VT1 - VT4, VT8, VT9 changes. At each moment, only one of the transistors VT1, VT3, VT8 will be open, so one of the outputs of the transistor under test will be connected to the 5 V supply line. At the same time, one of the transistors VT2, VT4, VT9 and the second output of the transistor under test are open in the other channel connected to resistor R6, which acts as a transistor output current sensor. In the third channel of a powerful switch, both field-effect transistors are closed, but at this moment all or part of one of the current-setting resistive circuits will be connected to its output, depending on the state of the low-power switch. Such a circuit is designed to supply current to the base of a bipolar transistor (or voltage to the field gate), through it twice in the same state of a powerful switch, the base or gate is "polled", first for the npn structure (n-channel), then for pnp (p- channel).

Fig. 2

A full transistor test cycle includes six combinations of the state of a powerful switch, while each transistor output will be connected twice as a collector, base and emitter (drain, gate, source). With one of the combinations, the outputs will be connected so that a current appears in the resistive circuit connected to the closed transistors of the switch, which is taken as the base one, and it, as you know, causes the output collector (and emitter) current to appear. On fig. 2 shows simplified circuits for switching on transistors when determining conclusions. The presence of the output current will cause voltage to appear on the current sensor R6, which fixes the state of the switch, and the corresponding information is displayed on the LCD indicators HG1, HG2.

However, the appearance of voltage on the sensor is only a necessary, but not sufficient condition for the correct determination of the conclusions. First, in two combinations, one of the forward-biased p-n junctions (collector or emitter) of the bipolar transistor will be connected to the power supply in series with the resistor R6, and this resistor will have a voltage of about 4,3 V. Revealing such a false definition is quite simple: when changing the connection point of the resistor R (Fig. 2) from +5 V to a common wire, or vice versa, the output current will practically not change. Secondly, due to transients at the moments of change of states of a powerful switch, voltage pulses appear on the resistor R6. The detection process during the occurrence of these pulses is blocked. Thirdly, when the transistor is turned on inversely, a current also flows through it, but its value is small, and such a false determination can be eliminated using a threshold device. Finally, the transistor may simply be broken or the X1-XXNUMX terminals are accidentally closed. All of these factors are taken into account in the device circuit.

Before proceeding to the description of the process of determining the conclusions, consider the operation of the threshold device assembled on the op-amp DA1.2 and the transistor VT11. The inverting input of this op-amp is connected to resistor R6, and the non-inverting input is connected to a reference voltage source of 0,5 V, collected on resistors R22, R25 and a current regulator on a VT10 transistor and resistor R29. This voltage sets the lower threshold for determining the outputs of the transistor based on the minimum specified value h21e- In the vast majority of cases, the inverse mode of the transistor under test will not be detected with these parameters. When switching the threshold device, a positive voltage drop from the resistor R32 is supplied to the input C of the DD6.1 trigger to fix the state of the powerful switch, "interrogate" the base and start measuring next reset pulse. At the output 2 of the counter-decoder DD3, a high level voltage is set. This voltage is supplied to the input S of the trigger DD2, and at its inverse output for about 3 ms a low-level voltage is generated, which is supplied to one of the inputs of the OR-NOT element DD2 and is necessary to protect the delayed determination during transients in the switch. After this time interval, a clock pulse appears at the output of the DD0 element, causing the trigger DD9 to switch, and then the counter-decoder DD6.1. Its output 8 will go high, and the pin definition cycle will begin.

The outputs of the counter-decoder DD9 are connected to the inputs of the elements DD11.1 -DD11.4, DD12.1, DD12.2 so that the control signals of the three-channel switch are formed at the outputs of these elements. The same signals, together with the output signals of the DD6.2 trigger, control the operation of three identical code converters to display the alphabetic characters "C", "b" and "E" in the three most significant digits of the HG2 LCD indicator. The converters are made on the elements DD1.2-DD1.4, DD2.1 - DD2.4, DD7.1, DD7.3, DD7.4, DD8.1, DD8.2, DD8.4, DD14.1-DD14.4. 15.1 and DD15.4-DD3.1. The state of the transistors of a powerful switch (open / closed) is controlled, as already mentioned above, through level converters DD3.6-DD5, which convert input signals of 10 V to output voltages of about 1 V, necessary for reliable opening of transistors VT4-VT8 , VT9, VTXNUMX.

The inputs of the elements DD5.1, DD5.2 receive two pulse signals (meander): with a repetition period of 32 ms - from the inverse output of the trigger DD6.2 and clock 16 ms - from the output of the element DD5.4. From these voltages, at the outputs of the elements DD5.1, DD5.2, pulses with a duration of 8 ms each with a repetition period of 32 ms are formed. First, the pulse is at the output of the first element, and after it is over, at the output of the second. The purpose of the first pulse is protection against false detection, it enters the input D of the trigger DD6.1, and its inverted output continues to hold a low voltage, allowing the passage of clock pulses to the output DD5.4. The purpose of the second pulse is to "polling" the base (gate) of the transistor under test.

The three resistor circuits R5.2-R3, R5R12R17 and R19R24R26 mentioned above are connected to the output of the DD27 element. The choice of one, two or three resistors, and hence the base current, is determined by the position of the contacts of the SA1 switch and the SB1 button, while the analog switches DD13.1-DD13.4, DD16.3, DD16.4 disconnect and connect the corresponding resistors in these circuits . "Polling" begins with the npn structure - for 8 ms, the resistors of these circuits will be connected to the 5 V supply line. If, at the same time, a pulse with a voltage greater than the threshold does not occur on the current sensor R6, then after this time interval for 16 ms, the resistors of these circuits will connected to a common power line - a "poll" of the base for the rr structure is carried out. If in this case the specified pulse does not occur on the sensor R6, then after the allotted time, the counter-decoder DD9 passes into the following state - the combination of open and closed transistors of the powerful switch changes, the procedure of protection against false detection and "interrogation" of the base is repeated again. It should be recalled that the polling occurs only in the channel with closed transistors of a powerful switch, since the actions of the remaining resistive circuits are blocked by open transistors.

When a voltage greater than the threshold appears on the resistor R6, the comparator on the op-amp DA1.2 switches and a pulse will be sent to the input C of the trigger DD6.1, which will switch it to a state with a high logic level voltage at the inverse output. The transistor VT7 will open, and the input of the ADC DD10 through the analog switch DD16.2 will be connected to the second current sensor - resistor R14 to measure the p21e of the low-power transistor under test. When the SB1 button is pressed, the VT6 transistor will open, and through the open analog key DD16.1, the opening voltage will go to the gate of the VT5 transistor. Resistor R6 will be connected in parallel with resistor R9, and resistor R14 will be connected in parallel with R13, in this case medium and high power transistors are tested.

The LCD indicator HG1 will display the value of the current transfer coefficient of the transistor under test, and on the indicator HG2 (from left to right) - the alphabetic characters of the pin names, in the right digit - the alphabetic character of the structure of the bipolar or channel type of the field-effect transistor (Fig. 3). In the absence or malfunction of the transistor under test, a small value of p21e, the switching of the counter DD9 does not stop until a high level voltage is generated at its output 7, which is fed to the input R of the trigger DD6.1, and three characters appear on the LCD indicator HG2 b", "b", "b" (Fig. 4).

Switching the counter DD9, both at the CN input with successful determination of the conclusions, and at the R input with uncertainty, causes the clock pulses to stop coming from the output of the DD5.4 element, which means that the state of the outputs of the powerful switch and code converters is fixed until the next reset pulse arrives through 2 s.

When determining the findings of field-effect transistors with a low resistance of the open channel, as well as composite bipolar ones with n21E more than twenty thousand, high currents may flow. Therefore, a current limiting unit assembled on the DA1.1 op amp and the VT7 transistor was introduced into the device. An exemplary voltage of 1.1 mV is supplied to the non-inverting input of the op-amp DA220. With an increase in current through the transistor under test to 2,2 A (for high-power transistors) or 44 mA (for low-power ones), the voltage at the source of transistor VT7 will exceed the exemplary one, the voltage at the gates of transistors VT5 and VT7 will decrease and the current through the transistor under test will be limited. The LCD indicator HG1 will display a sign of overcurrent - one in the most significant digit.

The output signal of the DD12.4 element is designed to indicate the decimal point in the third digit of the HG1 LCD indicator to display the value of p21E in thousands when testing composite transistors and voltage in voltmeter mode. To measure DC voltages, the SA2 switch is switched to the "U" position, and measuring probes are connected to the sockets XS4, XS5 "Voltmeter". In this mode, you can control the supply voltage of the device by pressing the SB2 "Battery" button, as well as determine the location of the pins and the structure of the tested transistors without measuring h2i3.

Resistor R13 is made from a piece of manganin or constantan wire, the rest are fixed resistors C2-23, MLT or surface-mounted RN1-12, and R30 is made up of several connected in series, a tuned resistor - SPZ-38B. Capacitors - ceramic K10-17 or for surface mounting. The use of Schottky diodes 1N5818 (VD2, VD3) is justified by obtaining the maximum supply voltage of the DD3 microcircuit, these diodes are replaceable by Ha1N5817, 1 N5819 or D310.

The main criterion for replacing the field-effect transistors indicated in the diagram is the minimum resistance of the open transistor channel. For transistors of a powerful switch and VT7, no more than 0,1 Om, VT5 -0,01 Ohm, and / T6 - 2 Ohm at a gate-source voltage of 4,5 V. We can replace the 2SK241 transistor with any low-power cutoff voltage of 0,5 ... 1,5 V. LM358N op amp can be replaced with LM158, LM258, LM2904 op amps. Switches - VZOZZ, button - TS-0108, sockets X1-XZ - gold-plated from a disassembled socket of a domestic 2RMT connector.

All parts are mounted on two universal breadboards 60x90 mm each, fixed one above the other. The top board contains most of the microcircuits, indicators, sockets for connecting the transistors under test, switches and a button. To save space, part of the microcircuits is located under the indicators, and for ease of mounting the indicators, they are installed in sockets made of panels for microcircuits (Fig. 5). The battery holder, powerful field-effect transistors and op amp are installed on the bottom board (Fig. 6). The installation is performed with a single-core tinned copper wire with a diameter of 0,25 ... 0,3 mm with a PTFE insulating tube.

For correct reading of information about the location of the terminals of the transistor under test, the sockets for its connection should be placed on the board (from left to right) in the following sequence: XS3, XS2, XS1. During installation, capacitors C1 and C2 are installed directly at the microcircuits DD1, DD5, respectively. Installation of high-current circuits (transistors VT1-VT9, resistors R13, R14) should be carried out with short wires. Pin 30 of the ADC DD10 (IN LO) is connected to a common wire at the output of the source of the transistor VT5 to reduce interference.

The adjustment comes down to calibrating the device with a resistor R10 in voltmeter mode, for which voltage is applied to the input from an exemplary voltage source. A selection of resistor R29 sets the gate voltage of the transistor VT10 to 0,5 V.

Author: S. Glibin, Moscow; Publication: radioradar.net

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