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ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING Refinement of imported electronic watches. Encyclopedia of radio electronics and electrical engineering
Encyclopedia of radio electronics and electrical engineering / Clocks, timers, relays, load switches The practice of using inexpensive imported electronic devices with built-in clocks revealed a significant instability of the current time readings. The reasons for this phenomenon and ways to overcome this shortcoming are described in this article. Most of the foreign radio receivers produced until recently (even well-known companies) with built-in digital electronic clocks suffer from great inaccuracy. This, in particular, applies to radio alarm clocks Sony model "ICF-C760L", Panasonic model "RC - 6099E" and others. Therefore, on weekdays, with a heavy load and, accordingly, a frequency below 50 Hz, the clock, as a rule, lagged behind, and on weekends, with a low load, it was accurate or even in a hurry. And only relatively recently, manufacturers began to use quartz stabilization of the driving frequency in such devices. In order to make the operation of the clock in previously released models of radios, radio alarm clocks and other products powered by the mains accurate, it is necessary to generate a clock frequency with a quartz-stabilized oscillator. But the relative complexity of solving this problem lies in the fact that the frequency of a standard clock quartz resonator of 32 Hz is not a multiple of 768, and the use of resonators for higher frequencies requires a large number of microcircuits to build the required frequency divider [50] or microcircuits of specialized dividers. For example, with a generator frequency of 1 MHz, it is necessary to build a divider by 1. Refinement of the clock, in which the frequency of 50 Hz is also used for dynamic indication, is described in [2]. If the watch has a static indication, the task can be solved much easier. The device for generating a clock signal (its circuit is shown in the figure) allows you to solve the problem using a standard clock quartz resonator and two microcircuits. However, it uses not quite the usual way of forming the required frequency. For the clock chip, it is not so important whether the clock input receives pulses with a frequency of 50 Hz uniformly in time or short sequences of 50 pulses of a higher frequency are used for 1 s. In the proposed device, two packs of 25 pulses each are formed per second.
The formation of the necessary time intervals, as well as pulse sequences, is performed by the DD1 chip. The K176IE5 microcircuit functionally consists of a generator part, to which a quartz resonator is connected, and two divider counters with a total conversion factor of 215. The output of bit 14 of the frequency divider chip DD1 (pin 4) is connected to the reset inputs R binary counters DD2.1, DD2.2. Rectangular pulses arriving at the inputs R of these counters have a frequency of 2 Hz. During the first half of the period equal to 0,25 s, log. 0 allows counters DD2.1 and DD2.2 to work. In the second half of the period log. 1 resets the counters and keeps them in this state until the start of the next period. Rectangular pulses with a frequency of 32768 Hz from the output K of the DD1 chip (pin 11) are fed to the counting input of the counter DD2.1 SR. Four-digit binary counters DD2.1 and DD2.2 are connected in series. The first three bits of DD2.1 divide the input frequency by 8, and the fourth bit of DD2.1 and all bits of DD2.2 together with diodes VD1, VD2, VD3 and resistor R2 form a 25 counter with blocking. Thus, the resulting five-digit counter counts the pulses coming to it from the output of the divider by 8 (the output of the 4rd and 2.1th bits of DD6). So far, at least one of the pins 13, 14 or 2 of the DD0 chip has a log level. 1, the log is also stored at the CN input (pin 2.1 DD0). 2, allowing the passage of pulses at the input of the SR (pin 2.1 DD6). After pins 13, 14, 25 are set to unity levels, which corresponds to decimal number 1, a log will appear at the CN input. 0,25 and block the further passage of impulses. Thus, during those 4 s, when there is no reset signal at the R inputs, 2.1 pulses with a frequency of 25 Hz (4096:32) are formed at the output 768 of the counter DD8. These pulses are fed through the key on the transistor VT1 to the clock input of the clock chip. During the next 0,25 s, the counters will be in their original state, during the second period the whole cycle will repeat. The device, made according to the proposed scheme, is installed in a Philips radio receiver model "AS 470" and works with the MM5387 clock chip. The device is powered by the same source as the radio clock. The output signal is applied to the clock input of the clock chip instead of the 50 Hz pulses coming to this point from the winding of the power transformer and the half-wave rectifier. When installed in another radio alarm clock, where the supply voltage of the clock chip is 9 ... 12 V, the resistor R3 and the zener diode VD2 can be excluded from the circuit. Literature
Author: D. Berdichevsky, Moscow
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