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CLAY on CMOS elements. Encyclopedia of radio electronics and electrical engineering

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Encyclopedia of radio electronics and electrical engineering / Radio amateur designer

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Linear voltage generators (CLAY) are used in a wide variety of applications and are widely known pulse devices. On fig. 1 shows a generator circuit made on two OR-NOT logic elements. It is based on the usual circuit of an asymmetric rectangular pulse generator, in which, instead of a resistor, the current through which the time-setting capacitor is charged, a current generator based on a field-effect transistor VT1 is used. At the same time, the same circuit creates negative feedback.

CLAY on CMOS elements
Fig. 1

Timing diagrams illustrating the operation of CLAYS are shown in fig. 2. The pulses in the figure have a "rounded" appearance, as they are shown for the highest operating frequencies.

CLAY on CMOS elements
Fig. 2

CLAY works as follows. Let the output DD1.1 change the voltage from a high logic level to a low one. Capacitor C1 is discharged, i.e. on the plate connected to the input DD1.2 - low voltage level. Accordingly, the output of DD1.2 is a high level. The current generator on the field-effect transistor VT1 (the current is regulated by the tuning resistor R1) determines the repetition frequency of the generated pulses. The appearance of a high level at the output of DD1.2 turns on the current generator, and its current charges the time-setting (according to the circuit) capacitor C1. The voltage on the right capacitor plate increases linearly, and the left capacitor plate is closed through the DD1.1 output to a common wire, since this output has a low voltage level. Thus, a linearly increasing voltage is formed on the right plate of the capacitor C1.

The input and output of DD1.2 are connected through a current generator with some internal resistance. This means that due to the negative feedback from the output to the input, DD1.2 operates in a linear mode as an inverting amplifier. As the voltage at the input of DD1.2 increases, the voltage at its output decreases until it reaches the switching level of DD1.1. Typically, this level is about half the supply voltage. At the output of DD1.1, a high voltage level appears, and the left side of the capacitor is connected through the output of DD1.1 to the positive pole of the power source. The capacitor is quickly discharged to a common wire through the diode VD1 and the output of the logic element (LE) DD1.2. When the voltage at the input DD1.2 reaches zero, a high voltage level appears at its output. At the same time, DD1.1 switches, a low voltage level appears at its output, and a new cycle of pulse formation begins.

A short pulse is removed from the output of DD1.1, preceding the beginning of the formation of LIN. Diode VD2 provides protection for input DD1.2 from negative voltage. The left plate of the capacitor before switching is connected to the common wire through the output DD1.1. As a result, a negative voltage appears at the DD1.2 input, and the voltage generation starts from a low (negative) level. In order to eliminate this undesirable effect, a VD1.2 diode is connected between the DD2 input and the common wire, which limits the negative voltage to 0,6 ... 0,7 V (0,2 ... 0,4 V for a germanium diode).

This CLAY can operate at pulse repetition rates of tens and hundreds of kilohertz. At these frequencies, even high-speed op-amps do not work well. This circuit is used in a power supply with conversion to RF and output voltage stabilization using pulse-width modulation.

Author: E. Solodovnikov, Krasnodar

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