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Sawtooth voltage generator on a 555 timer. Encyclopedia of radio electronics and electrical engineering

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Encyclopedia of radio electronics and electrical engineering / Radio amateur designer

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A sawtooth signal can be formed in many ways, one of the most popular ways is to charge a capacitor with a stable current. In this case, the voltage on the capacitor will increase linearly, and if the capacitor is completely discharged when the maximum voltage is reached on it, then a sawtooth signal will be generated. In essence, the circuit is an ordinary relaxation oscillator.

Typically, to implement such a generator, a thyristor or its analogue on bipolar transistors is used. But you can use an alternative method by using the integrated timer 555 (KR1006VI1). A diagram of such a sawtooth voltage generator is shown in Fig. 1. It consists of a stable current source made on a transistor VT1 and a zener diode D1, and a discharge control unit made on a 555 integrated timer chip (KR1006VI1) and diode D2.

Sawtooth voltage generator on a 555 timer
Rice. 1. Schematic diagram of a sawtooth voltage generator on a 555 timer (KR1006VI1)

Output 3 of the timer is connected to input 5 through diode D2, which allows the voltage on the internal divider to be reduced to zero if there is a low level signal at the output of the timer. This configuration allows almost complete discharge of the capacitor C1. As soon as the capacitor is discharged to a certain minimum voltage, the timer switches and the capacitor starts charging from the current source, and then the process is repeated cyclically.

The oscillation frequency of the sawtooth voltage generator depends on the capacitance of the capacitor C1 and the resistance of the resistor R1. The frequency is determined by the formula

F=0,4/R1C1. With the ratings indicated on the diagram, it will be approximately 4 kHz.

The current flowing through the resistor R1 must be small, since in the process of discharging the capacitor, the output of the current source closes to ground. This current is calculated by the formula

I=(VD1-Vbe)/R1,

where VD1 is the stabilization voltage of the zener diode D1 (in this case 4,7V) and Vbe is the forward voltage at the base-emitter junction of the transistor VT1 (0,7V). To obtain a good waveform, the current flowing through the resistor R1 should not exceed 20 mA.

As a transistor VT1, you can use almost any low-power low-frequency pnp transistor, for example, KT502. Zener diode D1 - any with a stabilization voltage of 4,7 volts. If you use a zener diode for a voltage of 2,7 volts, then the supply voltage of the circuit can be reduced to 5V. Diode D2 - any silicon, for example, kd503, kd 509.

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