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Counters and frequency dividers. Radio - for beginners

Radio - for beginners

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Pulse counters are indispensable components of electronic watches, microcalculators, frequency meters and many other instruments and devices of digital technology. They are based on triggers with a counting input. According to the logic of action and functional purpose, pulse counters are divided into digital counters and frequency dividers. The first of these are usually referred to simply as counters.

The simplest one-bit pulse counter can be a JK-flip-flop and a D-flip-flop operating in counting mode. It counts input pulses modulo 2 - each pulse switches the flip-flop to the opposite state. One trigger counts up to two, two connected in series count up to four, n triggers count up to 2n pulses. The result of the count is formed in a given code, which can be stored in the meter's memory or be read by another device of digital decoder technology.

On fig. 1a shows a diagram of a three-digit binary pulse counter built on a K155TB1 JK flip-flop.

Counters and frequency dividers
Rice. 1 Three-digit binary counter

Mount such a counter on a breadboard and connect LED (or transistor - with an incandescent lamp) indicators to the direct outputs of the triggers, as you did before. Apply from the test generator to the input From the first trigger of the counter, a series of pulses with a repetition rate of 1 ... 2 Hz and, using the light signals of the indicators, plot counter operation graphs.

If at the initial moment all the triggers of the counter were in the zero state (you can set the "Set 1" button switch SB0 by applying a low-level voltage to the input R of the triggers), then by the decay of the first pulse (Fig. 1, b), the trigger DD1 will switch to a single state, a high voltage level will appear at its direct output (Fig. 1, c). The second pulse will switch the DD1 trigger to the zero state, and the DD2-B trigger will switch to a single state (Fig. 45, d). On the decline of the third pulse, triggers DD1 and DD2 will be in a single state, and trigger DD3 will still be in zero. The fourth pulse will switch the first two triggers to the zero state, and the third one to the single state (Fig. 1e). The eighth pulse will switch all triggers to the zero state. On the decline of the ninth input pulse, the next cycle of the three-digit pulse counter will begin.

Studying the graphs, it is easy to see that each senior bit of the counter differs from the junior one by twice the number of counting pulses. So, the period of pulses at the output of the first trigger is 2 times greater than the period of input pulses, at the output of the second trigger - 4 times, at the output of the third trigger - 8 times. In the language of digital technology, such a counter operates in the 1-2-4 weight code. Here, the term "weight" refers to the amount of information received by the counter after setting its triggers to zero. In devices and instruments of digital technology, the most widely used are four-digit pulse counters operating in the weight code 1-2-4-8.

The frequency dividers count the input pulses up to a certain state specified by the counting coefficient, and then form the trigger switching signal and the zero state, start counting the input pulses again up to the specified counting coefficient, etc.

For an example in fig. 2 shows the scheme and graphs of the divider with a counting factor of 5, built on JK flip-flops.

Counters and frequency dividers
Rice. 2 Scheme and graphs of the divider

Here you have a three-digit binary counter supplemented with a logical element 2D-NOT DD4.1, which sets the counting factor 5. It happens like this. With the first four input pulses (after setting the triggers to zero with the SB1 "Set 0" button), the device operates as a normal binary pulse counter. At the same time, a low voltage level operates at one or both inputs of the DD4.1 element, so the element is in a single state.

On the decline of the fifth pulse, a high voltage level appears at the direct output of the first and third triggers, and hence at both inputs of the DD4.1 element, switching this logic element to the zero state. At this moment, a short low-level pulse is formed at its output, which is transmitted through the diode VD1 to the input R of all flip-flops and switches them to the initial zero state. From this moment, the next cycle of the counter begins.

Resistor R1 and diode VD1, introduced into this counter, are necessary in order to prevent the output of element DD4.1 from shorting to a common wire.

You can check the operation of such a frequency divider by applying pulses to the input C of its first trigger, following at a frequency of 1 ... 2 Hz, and connecting a light indicator to the output of the DD3 trigger.

In practice, the functions of pulse counters and frequency dividers are performed by specially designed microcircuits with a high degree of integration. In the K155 series, for example, these are the K155IE1, K155IE2, K155IE4 counters, etc. In amateur radio development, the K155IE1 and K155IE2 microcircuits are most widely used.

Conditional graphic designations of these microcircuits counters with numbering of their conclusions are shown in fig. 3.

Counters and frequency dividers
Rice. 3 Chip counters

The K155IE1 microcircuit (Fig. 47, a) is called a ten-day pulse counter, that is, a counter with a counting factor of 10. It contains four flip-flops connected in series. The output (pin 5) of the microcircuit is the output of its fourth trigger. All triggers are set to the zero state by applying a high level voltage simultaneously to both inputs R (pins 1 and 2), combined according to the AND element circuit (symbol "&"). Counting pulses, which should have a low level, can be applied to the inputs C connected together (pins 8 and 9), also combined by I., or to one of them, if at that time the second one has a high voltage level. With every tenth input pulse at the output, the counter generates a low-level input pulse equal in duration.

The K155IE2 microcircuit (Fig. 3, b) is a binary-decimal four-digit counter. It also has four triggers, but the first one has a separate C1 input (pin 14) and a separate direct output (pin 12). The other three flip-flops are interconnected so that they form a divisor by 5.

Counters and frequency dividers
Rice. 4 Frequency dividers

When the output of the first trigger (pin 12) is connected to the input C2 (pin 1) of the circuit of the remaining triggers, the microcircuit becomes a divider by 10 (Fig. 4, a), working in the code 1-2-4-8, which is symbolized by the numbers at the outputs of the graphic microchip designations. To set the counter triggers to the zero state, a high-level voltage is applied to both inputs R0 (pins 2 and 3).

Two combined R0 inputs and four separating outputs of the K155IE2 chip allow you to build frequency dividers with division ratios from 2 to 10 without additional elements. For example, if you connect pins 12 and 1, 9 and 2, 8 and 3 (Fig. 4, b), then the counting factor will be 6, and when connecting pins 12 and 1, 11, 2 and 3 (Fig. 4,c), the counting factor will become 8. This feature of the K155IE2 microcircuit allows it to be used both as a binary pulse counter and as a divider frequencies.

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