ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING Chips for the device Frame in frame. Encyclopedia of radio electronics and electrical engineering Encyclopedia of radio electronics and electrical engineering / Телевидение Let us remind you why a TV needs a PIP device - “Picture in a Frame” (or POP - “Picture out of a Frame”). It allows you to get one or more small frames of other programs on the TV screen, along with the main image, located either in the main field (PIP) or next to it (POP). Some microcircuits for such devices have already been described in the Radio pages. However, since then new generations of microcircuits have appeared. They are discussed in the article published here. The author also describes a schematic diagram of one of the device options, its printed circuit board is given. SIEMENS has developed several generations of chips for “Picture-in-Picture” devices. The features of the first generation kit (SDA9086 - SDA9088) were discussed in [1 and 2]. In 1993, a second generation chipset appeared: SDA9187 and SDA9188. The first of them contains three ADCs and circuits for generating digital signals, and the second is a PIP processor with field and line memories. The use of a third chip (SDA9086) in the PIP device, which generates the clock signal of the main image, is not necessary. In this case, the clock signal can be generated by the internal PLL included with the SDA9188 processor. A quartz resonator at a frequency of 20,48 MHz is connected to it. Instead of a quartz one, you can use a ceramic resonator. The selection of the internal PLL device is provided via the l2C bus. To do this, level 2 is written to bit d9188 of the SDA04 register with subaddress 0. The address of the microcircuit is the same as that of the SDA9088, i.e. 00101110. In the second generation of microcircuits, the ADC bit capacity was increased from five to six, which improved the quality of the frame entered into the main image field. There are two possible sizes - 1/9 and 1/16 of the screen area. The microcircuits can operate in TVs with frame rates of both 50 and 100 Hz (bit d3 in register 00 is set to level 0 or 1, respectively). Analog luminance and color difference signals with positive or negative polarity are converted into three six-bit digital signals by three ADCs in the SDA9187 chip, operating at a clock frequency of 13,5 MHz (in 100 Hz mode the clock frequency is increased to 27 MHz). If the polarity of the color difference signals supplied to the microcircuit is positive, pin 14 must be connected to the common wire. The free state of this pin or the supply of +5 V to it corresponds to the negative polarity of the color difference signals. The nominal swings of the input signals Y, U, V are equal to 1 V. Model constant voltages for them are obtained in the SDA9187 microcircuit on a divider consisting of internal resistors connected between pins 18, 20, 22 and 24. To reduce the solution of the amplitude characteristics of the ADC to 0,5, 20 V, between pins 22 and 128 connect an external resistor with a resistance of 2 Ohms. The nominal swings of the input signals increase to 18 V if a 20 Ohm resistor is connected between pins 530 and 22, and a 24 Ohm resistor is connected between pins 343 and XNUMX. Color difference signals are multiplexed. The result is a ten-bit stream in which the luminance signal occupies six bits. An adjustable luminance signal delay is provided for precise alignment of luminance and chrominance signals. The adjustment is ensured by changing the external voltages at terminals 25 - 27 in accordance with table. 1. The reduction in the number of lines and samples per line in a small image occurs in the interpolation horizontal and vertical filters, which prevents the appearance of interference distortions. Then the information is written to the memory with a capacity of 169812 bits (212 samples per line, 89 lines, 9 bits). The small image to be read is placed in one of the four corners of the main one. The output location is selected via the l2C bus (bits d6 and d7 in register 03). Also on the l2C bus, you can shift the input image vertically and horizontally (bits d0 - d3 of register 02 and d0 - d5 of register 03). Image reproduction is possible in field or frame mode. When field mode is set (bit d7 in register address 06 is set to level 0), only one field is written to memory. In frame mode (d7 = 1), the memory is constantly in recording mode. PIP device chips are used both in the D/K and B/G standards (625 lines), and in the American M standard (525 lines). The small image can be framed (bit d0 of register 01 contains level 1). Its line thickness and color are set via the I2C bus (bits d4, d5 in register 05 and d1 - d3 in register 01). With a size of 1/9, the small image consists of 88 lines, each of which contains 212 samples of the luminance signal and 53 samples of the color difference signals. With a size of 1/16, it contains 66 lines and 160 luma samples per line. The vertical and horizontal image size is set separately (bits d6 and d7 of register 05). This makes it possible to reproduce a small 16:9 picture on a 4:3 screen. To do this, it is sufficient to apply the image output mode with the number of lines 66 and the number of samples per line 212. Similarly, using the mode 88 lines and 160 samples per line, a 4:3 image is displayed on a 16:9 screen. Signals from the outputs of the SDA9188 processor can be output in the format R, G, B or Y, U, V (level 1 or 0 in bit d1 of register 00). It is possible to obtain a still, so-called “frozen” image. To do this, bit d5 in register 00 is set to level 1. Second generation PIP devices allow the use of a chrominance decoder in the small picture channel without a line delay line. This solution was first proposed in [3]. The possibility of eliminating the delay line is due to the interpolation of lines in the vertical filter of the PIP device. At the output of the decoder in PAL mode, both color difference signals are extracted during each line at half amplitude (relative to the nominal). After the vertical filter, the signal amplitudes increase to the nominal level. In the SECAM mode, the R-Y and B-Y signals with a nominal (unit) amplitude are allocated alternately through the line at the decoder outputs. After averaging in the vertical filter, half-amplitude signals are obtained. Therefore, in order to have the same color saturation of a small image in the PAL and SECAM modes, it is necessary to double the span of the SECAM color difference signals. The chrominance decoder must generate a color standard identification signal, which is fed to the central processing unit. In SECAM mode, the latter writes level 7 to bit d07 of the register with subaddress 1, then the transmission coefficient for color difference signals is doubled. The second generation PIP chips are produced in a package designed for surface mounting P - DSO - 28, which has 28 pins. In 1995, the third generation PIP chip SDA9288 appeared, which combined the functions of the SDA9187 and SDA9188 chips. This chip, like the second generation kit, provides one additional image with an area of 1/9 or 1/16 of the main image. However, new opportunities have also emerged. First of all, you can obtain the image in POP (Picture Out of Frame) format. The microcircuit contains a switchable matrix R, G, B (for SECAM/PAL, NTSC - USA and NTSC - Japan standards). You can select one of 2 frame colors via the I4096C bus. Adjustment of the brightness signal delay time is ensured not by changing external voltages, but via the I2C bus (bits d0 -d2 in register 04). In the microcircuit, by changing the external voltage at pin 15, one of three possible addresses can be set (11010110 at U15 = 0; 11011100 at U15 = 2,5 V and 11011110 at U15 = 5 V). This allows three independent images to be displayed using three PIP processors. Information about the reception of the SECAM signal can be directly supplied to pin 26. In this case, the transmission coefficient for color difference signals is doubled. SDA9288 microcircuits are manufactured in the P - DSO - 32 - 2 package, which has 32 pins. Rice. 1 illustrates the inclusion of the SDA9288 chip. The letters VP and HP denote vertical and horizontal pulses of the main image, respectively, and the letters VI and HI denote similar pulses of the input image; FB - output blanking pulses. Jumpers X2 and XZ are used to select the address of the microcircuit. The SDA9189 chip, released in 1995, is called "Quad - PIP". This name is given because it can create an input frame with an area equal to 1/4 of the area of the main image. In addition, the chip provides another 17 options for displaying small images, including four in size 1/16, three in size 1/9, nine in size 1/32. Four options are for 16:9 format. For example, one of them is three images located to the right or left of a standard 4:3 frame. The SDA9189 processor is used in conjunction with the SDA9187 chip, which, like in second-generation PIP devices, performs the functions of a built-in ADC and a digital information stream shaper. The main purpose of "Quadro - PIP" is scanning of selected channels. One image turns out to be moving, the rest are “frozen”. It is possible to introduce into each image an information inscription of five characters (Latin letters, numbers or symbols corresponding mainly to ASCII codes). The parity of the reproduced field is determined, which contributes to normal operation in the frame mode. The chip does not use the entire active part of the field of the input image. Sampling covers 576 luma samples per line and 252 lines per field. As in second-generation microcircuits, horizontal and vertical interpolation filters are used to condense information. For size 1/4, only two subsequent samples and two lines are averaged in the filters, for 1/9 - three samples and lines each, and for 1/36 - six samples and lines. The received information is written to the memory, which has a capacity of 329184 bits. If a single image is reproduced, the frame rate is 50 Hz, and the standards of the main and input images are the same (for example, 625 lines), then the frame mode can be realized when both even and odd fields are recorded. This improves clarity and temporal resolution. In all other cases, only even or odd fields are recorded. When reading a small image from memory, its position on the TV screen is set vertically and horizontally via the l2C bus. The processor has 21 eight-bit registers for writing commands. The contents of the registers are explained in Table. 2. The SDA9189 chip is provided with three of the same addresses as the SDA9288. The degree of horizontal and vertical displacement of the image is recorded in registers 02 and 03. A small image can be framed if desired. Its color is set by bits d0-d3 in register 09 (signal level Y), d0-d3 and d4-d7 in register 10 (signal levels U and V). A total of 4096 colors are provided. When playing multiple images, internal frames are inserted between them. If bit d0 in register 16 is set to 1, the entire TV screen, except for the input image, will have a software-defined color background. The outputs of the microcircuit can output either signals R, G, B (bit d0 of register 12 is 1), or Y, U, V (this bit is 0). The value of the d1 bit in the same register determines the polarity of the output color difference signals (they will be non-inverted when d1 = 0). The SDA9189 processor, like the SDA9188, allows you to select one of three matrices R, G, B: European (for PAL and SECAM signals - EBU standard), Asian (for the Japanese version of the NTSC system) and American. The EBU matrix will be selected when bit d2 of register 11 is 0. The differences are due to the different color coordinates of white and primary colors in the picture tubes used in these countries. For different matrices, you will get different amplitudes of color difference signals and phase angles with respect to the B - Y axis. They are listed in table. 3. To control the R, G, B switch located in the video processor, a blanking signal is output from the PIP processor. Its delay with respect to the luminance and color difference signals (bits d3 - d6 of register 01) is set via the I2C bus. This ensures the exact position of the input image in relation to the frame. The output signals are taken from external load resistors through which the currents of the three DACs flow. Author: B.Khokhlov, Moscow See other articles Section Телевидение. Read and write useful comments on this article. Latest news of science and technology, new electronics: Alcohol content of warm beer
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