Family of digital signal processors TDA755X. Reference data

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Family of digital signal processors TDA755X. Reference data

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Encyclopedia of radio electronics and electrical engineering / Application of microcircuits

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The TDA755X family of high-performance digital signal processors is designed to solve problems in the field of speech recognition and synthesis, echo and noise suppression.

Note the features of signal processors of the TDA755X family

24-bit computing core;
a large amount of integrated memory (up to 16 Kwords of ROM/RAM and up to 16 Kwords of RAM);
built-in 2-channel DAC and ADC with 16-bit capacity;
controllable sampling rate from 4 to 48 kHz;
built-in additional memory controller with support for flash memory, static and dynamic RAM;
serial interface operating in I modes²C or SPI.

The block diagram of microcircuits is shown in Fig. 1, the pinout is in Table. 1, and the pinout is in Fig. 2.

Family of digital signal processors TDA755X. Reference data. Chip block diagram
Rice. 1. Block diagram of microcircuits

Family of digital signal processors TDA755X. Reference data. Circuit pinout
Rice. 2. Pinout of microcircuits

The microcircuits include three main modules: a 24-bit digital signal processor (DSP), memory (ROM and RAM), and peripherals.

Parameters and functions of the processor core:

clock frequency 50 MHz;
addition and multiplication operations are performed in one clock cycle;
two 56-bit accumulators;
48-bit or parallel 24-bit register load instructions;
64 interrupt vectors;
the possibility of program prohibition and masking of interrupts;
cycle organization commands;
three data buses;
three address buses.

Integrated memory includes 16384 24-bit words of ROM and the same amount of RAM Peripheral devices include a serial audio interface, interface I²C/SPI, external memory interface, clock generator, codec (encoder/decoder).

Table 1

Output No.	designation	Signal category	Short description
1-2	EMI_AD5	enter exit	Multiplex address/data bus of external memory interface
3	VDD	input	Supply voltage of the digital part of the microcircuit
4	GND	input	Common power wire
5	EMI_AD7	enter exit	Multiplex address/data bus signal of external memory interface
06-13	EMI_A8/A15	output	External memory interface address bus
14	VDD	input	Supply voltage of the digital part of the microcircuit
15	GND	input	Common power wire
16-21	EMI_A16/A21	output	External memory interface address bus
22	DWRN	output	External memory interface "write" signal
23	TEST1	input	Test input #1 (active level - high)
24	TEST2	input	Test Input #2 (Active - Low)
25	MISO	enter exit	Data output in SPI Master mode, data input in SPI Slave mode
26	MOTION	enter exit	Data input in SPI Master mode, data output in SPI Slave mode
27	VDD	input	Supply voltage of the digital part of the microcircuit
28	GND	input	General
29	TEST3	input	Test input #3 (active level - high)
30	SDI	input	Serial audio interface data
31	SCK pins can be used	enter exit	Serial Audio Clock
32	LRCK	enter exit	Control clock signal (right/left channel) of the serial audio interface
33	VDD	input	Supply voltage of the digital part
34	GND	input	General
35	SDO	output	Serial audio interface data output
36	GPIO1	enter exit	Programmable I/O port
37	GPIOO	enter exit	- "-
38	GPIO5	enter exit	- "-
39	DBCK	enter exit	Debug Port Clock/Status #1 Can be used as a GPIO9 signal
40	DBIN	enter exit	Debug port data input/status signal #0 Can be used as GPIO11 signal
41	DBOUT	enter exit	Debug port serial data output Can be used as a GPIO10 signal
42	DBRQN	input	Debug mode request signal
43	NRESET	input	Chip Master Reset Active Low
44	INTN	input	External interrupt signal Active low
45	SCL/SCK	enter exit enter exit	Interface clock I²С In SPI interface mode, SPI bus clock
46	SDA/SS	enter exit input	Interface data I²C In SPI serial mode, slave select signal
47	VDD	input	Supply voltage of the digital part
48	GND	input	General
49	GPIO2	enter exit	Programmable I/O port
50	GPIO6	enter exit	- "-
51	GPIO3	enter exit	- "-
52	CGND	input	General
53	CVD	input	Codec module supply voltage
54	VOUTR	output	Analog signal from DAC (right channel)
55	VOUTL	output	Analog signal from DAC (left channel)
56	VDD	input	Supply voltage of the digital part
57	GND	input	General
58	VINR	input	Analog signal for ADC (right channel)
59	VINL	input	Analog signal for ADC (left channel)
60	CGNDA	input	General
61	TEST4	output	Connected with 22 kΩ terminating resistor
62	CVDDA	input	Codec module supply voltage
63	VREF	output	Reference voltage from codec module
64	REFCAP	output	Shunt Capacitor for Reference Output
65	GPIO7	enter exit	Programmable I/O port
66	GPIO4	enter exit	- "-
67	VDD	input	Supply voltage of the digital part
68	CLKOUT	output	Clock signal from the frequency divider
69	XTI	input	Connecting a quartz resonator
70	PGND	input	General
71	PVCC	input	Clock supply voltage
72	XTO	output	Connecting a quartz resonator
73	SALE	output	Address confirmation on external memory interface bus (active high)
74	GND	input	General
75	DRDN	output	External memory interface "read" signal
76-80	EMI_AD0/AD4	enter exit	Multiplex address/data bus signal of external memory interface

The serial audio interface transmits digital audio from an external source to the chip's DSP, as well as digital data from the DSP to an external DAC.

Interfaces I²C/SPI connect chips to other hardware compatible with these interfaces.

The external memory interface allows you to access additional memory banks installed outside the chip. Dynamic random access memory (DRAM), static random access memory (SRAM) and non-volatile memory (FLASH) are supported.

Parameters and functions of the external memory interface:

4-bit data bus for dynamic RAM (DRAM) and 8-bit for static RAM (SRAM);
The 22-bit address bus is multiplexed with the 8-bit data bus;
the ability to access a byte, 16-bit word and 24-bit word when working with static and dynamic RAM;
addressable memory when working with dynamic RAM up to 256 Mbit;
4 MB addressable static RAM.

The chip clock generator generates the following clock signals:

DCLK - clock signal for DSP;
MCLK - codec reference signal;
LRCLK - clock signal for the right/left channels of the serial audio interface and codec;
shift clock signal for serial audio interface and codec.

Codec parameters and functions:

analog-to-digital delta-sigma conversion of the input stereo signal;
ADC dynamic range - 80 dB;
digital-to-analog delta-sigma conversion of the output digital stereo signal;
sampling frequency from 4 to 48 kHz;
digital input and output via serial audio interface.

The functionality of the microcircuits is given in Table 2.

Table 2

Designation	A type memory for programs	Main function	Mode afterbirth. interface	Ext. memory	Audio input	Audio output	Program provide
TDA7550R	RAM	To choose	Master or Slave I²C	FLASH or RAM	Yes (specified application)	Yes (specified application)	Def. apply
TDA7550	ROM	Speech recognition	Slav I²C	FLASH	Yes (voice signal)	Yes (voice signal)	ASR 311 Lernout & Hauspie
TDA7551	-	Voice recognition	Slav I²C	FLASH	Yes (voice signal)	Yes (voice signal)	SV208 Lernout& Hauspie
TDA7552	-	Speech synthesizer	Slav I²C	-	No		TTS3000 Lernout & Hauspie
TDA7553	-	Digital signal filtering	master i²C or SPI	(RAM)	Yes (raw signal)	Yes (processed signal)	Program NCTI processing

The use of microcircuits of the TDA755X series

The TDA7550 chip with ASR311 software allows you to implement a speech recognition system. Parameters and functions of such a system:

high-quality recognition of words from the basic set in a wide range of changes in voice parameters;
high noise immunity of the recognition algorithm;
memorization of new words in addition to the basic set;
the ability to record voice messages to external FLASH memory to support the voice interface;
all system functions are controlled via interface I²C;
basic sets of words are available for most common languages;
external FLASH memory is used to store the basic word set (4 KB per word), additional word set (4 KB/word) and voice messages (11 KB/sec, sample rate 11025 Hz).

The block diagram of the speech recognition system is shown in Figure 3.

Family of digital signal processors TDA755X. Reference data. Block diagram of a speech recognition system
Rice. 3. Block diagram of a speech recognition system

The TDA7551 microcircuit is a single-case solution for voice identification systems using the SV208 software Passphrases are stored with triple repetition (phrase duration - 1 2 s) Subsequently, the spoken passphrase is compared with the parameters of the passphrases stored in non-volatile memory The system is controlled by the functions of the microcircuit through serial interface I²C.

The block diagram of the voice identification system is shown in Figure 4.

Family of digital signal processors TDA755X. Reference data. Block diagram of a voice identification system
Rice. 4. Block diagram of the voice identification system

The TDA7552 chip is intended for use as part of a speech synthesis system according to the "text-to-voice" scheme. To build such a system, in addition to the TDA7552 DSP, an ST1O microcontroller is required to analyze and convert input text strings.

The block diagram of the speech synthesis system is shown in fig. 5.

Family of digital signal processors TDA755X. Reference data. Block diagram of a speech synthesis system
Rice. 5. Block diagram of the speech synthesis system

The external device sends text strings to the microcontroller as a stream of ASCII characters.

The microcontroller analyzes and converts the incoming data, taking into account the language used (information about the conversion for various languages is contained in an external FLASH memory that the microcontroller has access to). The microcontroller sends the converted data via the I2C bus to the TDA7552 chip, which converts the received data into a speech signal.

The TDA7552 signal processor software is independent of the input text language and does not require additional external memory.

Publication: cxem.net

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