Frequency synthesizer for 27 MHz car radio. Scheme, description

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ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING
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Frequency synthesizer for 27 MHz car radio. Encyclopedia of radio electronics and electrical engineering

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Encyclopedia of radio electronics and electrical engineering / Frequency synthesizers

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This frequency synthesizer (MF), shown in fig. 1, used in car radio with double frequency conversion. The first IF has a standard value of 10,7 MHz. The MF generates a standard 40-channel frequency grid for transmitter operation and the necessary heterodyne frequency grid for operation of the first receiver mixer. This design provides for a grid shift of 5 kHz.

Schematic diagram. Fig.1

Operating range in transmission mode 26975...27365 kHz (26970...27360 kHz) (input A). Operating range in receive mode - 16275...16665 kHz (16270...16660 kHz) (output B). Grid step - 10 kHz. The level of modulating low-frequency voltage is 300...900 mV. The slope of the control characteristic is 300 kHz / V. Frequency tuning time: no more than 100 ms.

Although today there are single-chip MFs, they all have dynamic control and require the recording of a multi-bit word in a sequential code. At the same time, the control circuit for such synthesizers turns out to be quite complex and contains - 14 - 16 cases of the 561 series for a device similar to that given in the article. Compared to other similar midrange designs, including those published in RL, this design has the highest efficiency/cost ratio.

This MF is a single-loop phase-locked loop (PLL) with a three-state pulsed-phase detector (PLPD). The controlled generator (CG) for transmission operation is assembled on T1 according to the capacitive three-point scheme and turns on when T2 is opened. The signal through C6 is fed to a switchable division ratio divider (TPKD), which is formed by elements D1, D2, D3, D4. DPKD division factor M=4x(10N+A). The number A is set at the control inputs D3 in BCD.

The number N is set at the inputs D4. The components of the DPKD are: a high-frequency pre-divider by 40/44, a programmable counter D3, a low-frequency divider D4. The signal from the UG first goes to D 1, which, depending on the control signal, operates in the mode of division by 40 or 44. From the output of D1 (pin 5), the pulse sequence goes to the ESL -> CMOS level converter, assembled on T5, and then through the circuit blocking (D2) is fed to the counting input of the programmable counter D3. With the help of the counter D3, the divider D1 is controlled. A reference oscillator (OG) is assembled on D6, which generates 500 kHz oscillations. ICHFDZ is assembled on the same element. On element D7, an exhaust gas signal divider is assembled up to the value Fop = 1250 Hz.

The signal from the output of the DPCD and the reference oscillation of 1250 Hz are fed to the input of the PD. Depending on the phase ratio at the output of the FD (pin 13 D6), a control voltage (Ucontrol) appears, which, through the low-pass filter (R18, R19, C19, C20), acts on the varicap V1 (V2) of the VG and adjusts it so that the phase mismatch is reduced to a minimum. In the capture mode, the UG frequency will be exactly equal to Fg=FopM and its instability will not exceed that of the crystal oscillator. The control and indication circuit is assembled on the elements D8, D9, D10, D11, HG1, HG2, D12, D13, D14. The SB1 button controls the low-order counter, and SB2 - the high-order ones, which is convenient when searching for the desired channel. All code combinations necessary to control the midrange are recorded in the EPROM D12.

The midrange setting is reduced to the exact setting of the frequency of 500 kHz by capacitors C16, C17. Coils L2 (in transmit mode) and L1 (in receive mode) must be set to Ucontrol = 4,5 V at the CT point (with the twentieth channel number on the indicator). The UG frequency is determined by the ratio (in the transmission mode) Ftrans=1/2pSqr(L2Ct). St=C2+C4*C5/C4+C5. The current consumption is determined mainly by the control and indication circuit itself, and the synthesizer has Ipotr=12 mA. Varicaps V1, V2 are better to use type KV132A, instead of 564IE15, you can use KA561IE15A. Capacitor C19 must be with a minimum leakage current (oxide-semiconductor).

Literature

1. Levin V. et al. Frequency synthesizers with a pulse-phase-locked loop system.- M .: Radio and communication, 1989.
2. Manasevich V. Frequency synthesizers. Per. from English. - M., 1979.

Author: V. Vasiliev, Orenburg; Publication: N. Bolshakov, rf.atnn.ru

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