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ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING Autonomous 32-channel programmable light-dynamic device with a serial interface. Encyclopedia of radio electronics and electrical engineering
Encyclopedia of radio electronics and electrical engineering / Lighting Light-dynamic devices (SDU) are widely used for the aesthetic design of bars, discos, casinos, holiday illumination, in automotive electronics (for controlling stop-signal "lights"), as well as for organizing illuminated advertising. SDUs with programmable algorithms make it possible to implement a wide variety of light-dynamic effects and control a large number of light elements according to the program. Such a device can be implemented, for example, on one microcontroller and several registers, as interface circuits, to control a set of light elements. But, despite the simplicity of circuit solutions, the manufacture of such devices in the conditions of an amateur radio laboratory is limited, due to the inevitability of using an expensive programmer or computer. On the other hand, the use of common standard logic microcircuits makes it possible to build a completely autonomous multi-channel dynamic light device with an integrated programmer that does not require the use of any additional programmers in general, or a computer in particular. This allows you to reprogram a set of dynamic lighting effects in just a few minutes in a completely offline mode. The use of a serial interface implemented in this device allows you to simultaneously and synchronously control several garlands of light elements via three signal lines (not counting the common wire), the total length of which can reach 100 m.
Overview The programmable autonomous 32-channel SDU is an improved version of the device published in [1], and allows you to control independently each of the 32 light elements of the garland via 3 connecting lines of the serial interface. The upgraded version of the device takes into account all the features of the controller operation on uncoordinated lines of great length. This construction of the SDU allows you to increase the number of elements with minimal hardware costs without increasing the wiring harness and place the garland at a great distance from the main controller board. The variety of dynamic light effects is unlimited and depends on the user's imagination. This architecture has the potential to increase the number of light elements without a significant change in the serial interface protocol. (This will be discussed below). In the vast majority of designs of light-dynamic devices, each light element is controlled by its direct connection using a separate signal conductor to the main controller board. But, as a rule, such devices allow you to control only a small number of elements [2]. Increasing their number requires the use of additional memory chips and a corresponding increase in the wiring harness. This leads to a significant complication of both the circuitry and the program code required for "flashing" several memory chips. In addition, in this version it is impossible to control a set of light elements that are at a considerable distance from the main controller board. The practice of repeating light-dynamic devices, for example [2], shows that the published firmware, unfortunately, is far from perfect and contains gross errors. But, the user expects the result of the device to get exactly an aesthetic visual effect. Therefore, such an approach to the development of program code completely discourages the desire to repeat programmable light-dynamic devices, despite the wide variety of effects implemented by software. The proposed device does not have this disadvantage, and before storing the current dynamic light combination in memory, it is displayed on the control line of LEDs, which completely eliminates possible errors that may be made by the user in the programming process. The solution to the problem of increasing the number and controlling a set of light elements located at a great distance from the main controller board is the use of a serial interface between the main board and a garland consisting of registers, the light elements are connected directly to the outputs of which. In such a device, data transfer to the output registers is carried out for a very short period of time with a clock frequency of about 12,5 kHz (with a clock frequency of the RF generator of 100 kHz). The data packets follow each other at a frequency of about 10 Hz, which leads to a change in dynamic light combinations. Since the data update time in the registers is very short: 80 μs x 32 pulses = 2,56 ms, the change of combinations is visually imperceptible, which creates the effect of their continuous reproduction. The line is made with a bundle of 4 stranded conductors, including a "common" wire, with a line length of up to 10 meters, and a bundle of 7 stranded conductors, with a length of 10 to 100 meters. In the second case, each signal conductor ("Data", "Synchronization", "Indication enable") is made as a "twisted pair", the second conductor of which is grounded on both sides of the line, and, after that, all conductors are combined into one bundle. As is known, multiple signal reflections that occur in long mismatched lines, as well as the interference interaction of two signal lines included in one bundle, under certain conditions, can lead to errors in data transmission, which in the case of a dynamic light system means a violation of the aesthetic effect. This imposes restrictions on the length of the connecting line and imposes strict requirements on the noise immunity of a system using a serial interface.
The noise immunity of a system using a serial interface depends on many factors: the frequency and shape of the pulses of the transmitted signal, the time between changes in the levels (duty cycle) of the pulses, the specific capacitance of the line conductors included in the bundle, the equivalent line resistance, as well as the input impedance of signal receivers and output impedance drivers. It is known that the main criterion of noise immunity is the value of the threshold switching voltage of logic elements [3]. The threshold switching voltage of the inverting logic element is taken to be such a value at which the output of the element is set to a voltage equal to the input. For TTL microcircuits (K155 series), this value is approximately 1,1 V at a typical supply voltage of 5 V [3]. The use of such microcircuits in devices for transmitting and receiving data over long uncoordinated lines does not allow obtaining acceptable noise immunity even when working on a short line (5 m). The fact is that multiple signal reflections, the amplitude of which even slightly exceeds the value of the switching threshold voltage of logic elements (1,1 V), lead to multiple switching of the output registers, and hence to data transmission errors. The use of more advanced TTLSH-structure ICs (KR1533 series) does not solve the problem, since the threshold voltage for them is not much higher and is only 1,52 V at a standard supply voltage [3]. To partially compensate for the reflected signal, ordinary RC filters (the so-called integrating chains) are often used, but they themselves introduce distortions into the transmitted signal, artificially increasing the rise and fall times of the signal fronts. Therefore, this method is inefficient, and, ultimately, only leads to an increase in the total parasitic capacitance of the line, which creates an additional load on the signal translator chips on the transmitting side of the line. There is another problem associated with the use of RC filters. With an increase in the rise and fall times of the signal fronts, the time of "stay" of the control signal near the "dangerous" threshold level of the switching voltage of the logic element also increases, which, in turn, leads to an increase in the probability of a false switching of the output register under the influence of an interference signal. In the case of using microcircuits of the CMOS structure of the KR1564 series, symmetrical transfer characteristics provide noise immunity at the level of 45% of the power supply voltage, which is close to the ideal value (50%), and the system noise immunity increases with increasing power supply voltage, since the amplitude of the transmitted signal increases.
The modern element base - high-speed CMOS microcircuits with high load capacity and maximum noise immunity (their threshold switching voltage is almost equal to half the supply voltage) - allows you to build an SDU with a serial interface, the length of the connecting lines of which, taking into account the sections connecting the registers of the remote garland, can reach 100 m even when using a conventional twisted pair cable (no shielded conductors!). In addition, powerful buffer elements with Schmitt triggers of the KR1554TL2 type are used to translate signals into the line, the high load capacity of which allows direct control of the capacitive load.
The effects of long mismatched lines begin to appear when the signal propagation delay times along the line and back begin to exceed the duration of the rise and fall fronts of the signal. Any mismatch between the equivalent line impedance and the input impedance of the logic gate on the receiving side of the line or the output impedance of the driver on the transmit side will cause the signal to be reflected multiple times. The typical rise and fall times for the KR1564 series microcircuits are less than 5 ns, so the effects of long mismatched lines begin to appear at a line length of several tens of centimeters. Knowing the characteristics of the transmission line, such as total input capacitance and specific capacitance per unit length, it is possible to calculate the signal propagation delay time along the entire length of the line. A typical propagation delay time is typically 5-10 ns/m. If the length of the connecting line is long enough and the rise and fall times of the signal are short enough (i.e., the slope is high), the mismatch between the equivalent line resistance and the input resistance of the CMOS logic element at the receive side creates a signal reflection, the amplitude of which depends on the instantaneous value of the voltage applied to the input of the element, and the reflection coefficient, which, in turn, depends on the equivalent line resistance and the input resistance of the input logic element. Since the input impedance of the elements of the KR1564 series microcircuits is many times greater than the equivalent resistance of a line made by a twisted pair or a shielded conductor, the reflected voltage at the receiver input doubles. This reflected signal propagates along the line back to the transmitter, where it is reflected again, and the process is repeated until the signal is completely attenuated. The advantage of CMOS microcircuits, due to their high load capacity (KR1554 series), is the ability to directly control a capacitive load. Balanced (symmetrical) current-voltage transfer characteristics of the elements of these microcircuits make it possible to obtain almost the same rise and fall front times. In addition, to transmit signals to the line and receive, you can use buffer elements based on Schmitt triggers, which restore a strictly rectangular shape of a distorted signal, and thereby eliminate false triggering of registers. In addition, the presence of hysteresis in the transfer characteristic (at a supply voltage of 5 V for IS KR1564TL2, this value is approximately 400 mV) creates an additional margin of noise immunity [3]. Schematic diagram The device contains two registers connected in parallel. One of them is a control one installed on the main board of the device. LEDs are connected to the outputs of its microcircuits (DD18 - DD21), which provide visual observation of the programming process. The second - the output register (DD23, DD25, DD27, DD29) - is the control for the string of remote elements. Both registers work synchronously, but only the first of them participates in the programming process. The control of the output register, therefore, and the loading of data into it, is carried out via the signal lines of the serial interface: "Data", "Synchronization" and "Indication enable". The third line is auxiliary, this signal briefly turns off the IC outputs of all registers for the duration of the current combination loading, which eliminates the flickering effect of low-response LEDs. Thus, the garland of remote elements is connected to the main board of the device (not counting the shielding (required only for line lengths of more than 10 m) that form a pair for each signal conductor) with only four wires: "Data", "Synchronization", "Display resolution" and " General". Due to the use of a serial interface, such a construction of the device allows increasing the number of light elements with minimal hardware costs without significantly complicating the protocol. Their maximum number is limited only by the noise immunity of the communication line and the load capacity of the power source. With the specified values of the timing elements C4R12 of the RF clock generator assembled on the elements DD3.3, DD3.4, and setting the trimmer resistor R13 engine to the position corresponding to the maximum resistance (which corresponds to the frequency of the RF generator FT \u20d 100 KHz) and the execution of signal conductors lines with twisted pairs of wires, its length can reach XNUMX meters. The device uses a non-volatile memory IC with electrical erasure (EEPROM) with a capacity of 16 Kbps (16384 bits) of the AT28C16-15PI type. The amount of memory corresponding to one combination is 32 bits. The full cycle of the formation of a dynamic light effect, for example, "running fire" consists of 32 combinations. Thus, the amount of memory occupied by such an effect is 32x32=1024 bits, therefore, the maximum number of effects of this type that can be simultaneously written to EEPROM is 16384/1024=16. It should be taken into account that this effect is the most resource-intensive, so the real number of dynamic light effects that occupy less EEPROM address space can be much larger. To get even more effects, with the same number of elements of the garland, the amount of memory can be increased, for example, up to 64 Kb by replacing the EEPROM chip with an AT28C64-15PI and increasing the bit depth of the address counter. The programming process is quite simple and convenient: it is performed by successively pressing three buttons. The combination of light-emitting elements is set by successively pressing two buttons: SB1 - "Record "0" and SB2 - "Record "1", which correspond to the introduction of on and off LEDs to the line. The entry of "zero" corresponds exactly to the on LED, since this level appears at the corresponding output of the register. The LED combination written to the registers is shifted to the right by one digit immediately after the next pressing of any of the indicated buttons. The generated combination is recorded in the EEPROM by a single press of the SB3 button - "Saving the combination". In this case, a sequence of pulses is automatically generated, at which the current state of the control register is written to the EEPROM. It should be emphasized that such a programming algorithm makes it possible to completely eliminate possible errors that may be made by the user during the programming process, since there is no need to press the SB3 button immediately after entering the combination on the control bar, and only after making sure that using the SB1 and SB2 buttons is entered correct combination - press SB3. Principle of operation The electrical circuit diagram of an autonomous programmable 32-channel SDU is shown in fig. 1. The diagram clearly shows the connection of one output register, consisting of 8 microcircuits, using three signal conductors of the connecting line. There may be several such output registers, which, when connected in parallel, will work synchronously. A common conductor (not shown in the diagram) connecting the output register and the common wire of the main controller board is also part of the connecting line and must be made with a stranded wire with a cross section of at least 1 mm2. The device can operate in two modes: programming and reading. (The diagram shows the position of the SA1 switch corresponding to the playback mode). The programming mode is set in the lower (according to the diagram) position of switch SA1. This mode indicates the inclusion of the red LED HL2. At the same time, the operation of the low-frequency generator of rectangular pulses collected on the elements DD3.1, DD3.2 is blocked and a low logic level is formed at the output of the element DD3.2 (pin 6). Successive pressing of the buttons SB1, SB2 leads to the appearance of logic "0" levels at the outputs "1Q" or "2Q" of the DD2 chip, which contains 4 identical independent RS flip-flops. The appearance of any of these levels at the outputs "1Q" or "2Q", and therefore at one of the inputs of the element DD1.2, leads to the formation of a positive pulse at its output and its subsequent limitation in duration by the differentiating chain C2R10. Since the inputs "S0", "S1" of the DD14 multiplexer were set to logical "zeros", then its outputs will receive information from the inputs "A0", "B0". In this case, what level will be written to the first digit of the registers DD18, DD23 depends on the pressed button SB1 or SB2. When you press SB1, a logical zero will be written, when you press SB2, a logical unit. After introducing the combination to the control line of LEDs HL12-HL43, and hence to the control registers DD18-DD21, press the SB3 button. This initiates a cycle of writing the current combination to the EEPROM, consisting of 4 cycles. In each cycle, the contents of register DD16 are written to the buffer register DD21, it is overwritten in EEPROM, the information contained in the control registers DD18-DD21 is shifted to the right by 8 bits and the contents of register DD21 are written to register DD18. Thus, at the end of the 4th cycle, the contents of all 4 ICs of the control register will be written to the EEPROM with a simultaneous update of their state. When the button SB3 is pressed, a positive pulse is generated at the output "3Q" of the third RS-trigger of the IC DD2, equal in duration to the time the button is pressed. This pulse, after being inverted by the element DD4.1 and limited in duration by the differentiating chain C3R11, sets the 4th RS-flip-flop of the IC DD2 to a single state. The logical unit from its output "4Q" (pin 13) enables the operation of the RF generator, made on the elements DD3.3, DD3.4 and simultaneously prohibits the indication of the current light-dynamic combination contained in the control and output registers. This is necessary to eliminate the flickering effect of the fast-acting LEDs during the loading of a new combination. Also, this level affects the inputs of the logical elements DD11.1, DD11.2 and causes the appearance of the last of them at the output of the logical "1" level, which affects the input "S0" (pin 14) of the DD14 multiplexer and allows the passage to the outputs (pins 7 and 9) information from its respective inputs "A1", "B1". Since at the time of power-up the circuit for resetting counters DD6, DD7, DD8.1, DD8.2, DD9.1 is working, then at the initial time of the first of the 4 cycles of the recording cycle at the outputs "0" (pins 3) of counters DD6, DD7 logical unit levels are formed. The negative drop of the first pulse of positive polarity at the input "CP" (pin 13) of the counter DD6 will lead to the appearance of a logic unit level at the output "1" (pin 2), and hence the level "1" at the output of element DD5.2. This level, "passing" through the lower, according to the scheme, multiplexer DD14 and inverted by the Schmitt trigger DD17.3, affects the gate inputs "C" (pins 12) of the control registers DD18-DD21 (see the diagram in Fig. 2: negative difference " CLK1"). This logic level at the output of the element DD5.2 will remain until the decay of the third pulse at the input "CP" of the counter DD6 (see diagram in Fig. 2: positive drop (front) "CLK1"). During this period of time, between the recessions of the 1st and 2nd pulses, a negative pulse will be generated at the output of the inverter DD4.4 (see diagram in Fig. 2: "CLK2"). This pulse, after repeating the upper circuit multiplexer, which is part of the IC DD15, will write to the buffer register DD16 one bit of information from the output "PR" (pin 17) of the last bit of the control register DD21. The positive edge of the pulse at the output of the inverter DD4.4 coincides in time with the decay of the 2nd pulse at the input "CP" of the counter DD6 (see the diagram in Fig. 2: front "CLK2"). On the decline of the 3rd pulse at the input "CP" of the counter DD6, a positive drop ("CLK5.2") will be formed at the output of the element DD1, which, after repeating the DD14 IC multiplexer lower in the circuit and inverting the Schmitt trigger DD17.3, will record one bit of information from the output "PR" of the last bit of the control register DD21 to the first bit of the register DD18. Powerful Schmitt triggers DD17.1 and DD17.2 (included in the IC KR1554 TL2) are introduced into the device for direct operation on a line with a capacitive load, as well as to prevent the signal reflected from the line from entering the inputs of the control registers by separating the corresponding signal chains. The described procedure is repeated 8 times until the buffer register DD16 is filled and the contents of register DD21 are rewritten into register DD18. Upon completion of the 8th negative synchronization pulse at the input "C" of the buffer register (see the diagram in Fig. 2: front "CLK2"), the current state of the register DD16 will be completely rewritten in the DD21 register. This will happen on the decline of the 58th pulse at the input "CP" counter DD6. On this decline, the counter DD6 will go to the 3rd state. Since by this time the counter DD7 was already in the 7th state, then two signals of the level of a logical unit coming to the inputs of the element DD12.1 will cause a logic zero level to appear at its output. Thus, a negative pulse ("CS", see Fig. 12.1) will be generated at the output of the DD2 element, equal in duration to the pulse repetition period of the RF generator made on the elements DD3.3, DD3.4. After "passing" through the lower, according to the scheme, multiplexer IC DD15 (recall that its input "S0" is set to the "zero" level set by switch SA1), this negative pulse samples the IC chip EEPROM DD15 at the input "CS" ("Chip Select"-"Crystal Select") and, thereby, produces a parallel record of 8 bits of information generated at the outputs of the buffer register DD16 at the address set at the inputs A0-A10 of the EEPROM DD13. Visual control of the filling of the address space of the IC EEPROM DD13 is carried out by a line of LEDs HL3 - HL11, displaying the current address of the binary counters DD8.1, DD8.2, DD9.1. The first six LEDs HL3-HL9, green indicate the filling of the first 25% of the address space, yellow HL10 in combination with green - from 25 to 50%, red HL11 in combination with yellow and green - from 50 to 100%. Simultaneous illumination of all LEDs in write mode indicates that the entire EEPROM address space is full, except for the cells at the last four addresses. After recording the dynamic combination of light at the last four addresses, the counters DD8.1, DD8.2 are set to zero, and DD9.1 - to the eighth, which is accompanied by the extinction of the LEDs HL3-HL11. All address lines are set to "zero" levels. In this case, the recording of the program can be repeated. The reading mode is set by switching the SA1 switch to the upper position, according to the diagram, which corresponds to the turning on of the green LED HL1. The device can be switched to this mode at any time without even completing the programming of the entire EEPROM address space. In this case, the program recorded earlier at the addresses will be played from the current address to the end of the address space, and then the program playback cycle will continue, starting from the zero address of the EEPROM. If the read mode is set before power on, the reset circuit assembled on the elements C6R15, DD1.3, DD1.4, DD5.1 will set the counters DD6, DD7, DD8.1, DD8.2, DD9.1 to zero. In this mode, the level of a logical unit from the left, according to the scheme, the output of the switch SA1 will allow the operation of the low-frequency generator, made on the elements DD3.1, DD3.2 with a frequency of about 10 Hz. Pulses of positive polarity from the output of the DD3.2 element, after being inverted by the DD4.1 element and limiting the duration of the C3R11 differentiating chain, will cause the 4th RS-flip-flop of the IC DD2 to be set to a single state. In this mode, the decline of the first positive pulse at the input "CP" of the counter DD6 will set the latter to a single state, which will lead to switching to the zero state of the element DD10.1. The level of logic zero from its output, being inverted by the element DD10.2, affects the input of the element DD11.4 and, together with the level of "one" coming to the second input of this element, also sets the level "1" at its output. This level will cause the outputs of the buffer register DD16 to switch to the third state - now they have become inputs (see diagram in Fig. 2: front "SL"). On the decline of the second pulse at the input "CP" of the counter DD6 at its output "2" (pin 4) there is a logic level "1", which translates the element DD5.3 into a single state. A unit level from its output affects the input of the element DD12.3 and, in combination with the level of a logical unit coming to the second input of this element, will set a logic zero level at its output. This logic level, acting on the input "OE" ("Output Enable" - "Enable Outputs") of the EEPROM IC DD13, leads to switching its outputs to the active state (see diagram in Fig. 2: decline "OE"), as well as, "passing" through the lower, according to the scheme, multiplexer DD15 (since its input "S0" is now set to level "1"), leads to the selection of the EEPROM IC DD13, at the input "CS". At the outputs "D0" - "D7" of the EEPROM, the data appears written at the current address currently set at the address inputs "A0" - "A10". At the same time, on the decline of the second pulse at the input "CP" of the counter DD6, the formation of a negative pulse of parallel writing to the buffer register DD16 begins (see diagram in Fig. 2: the first decline "CLK2"). This pulse is generated at the output of the element DD11.3 at the beginning of each of the 4 cycles of the reading cycle, i.e. before the formation of each of the 8 clock pulses ("CLK1") of the control and output registers. The formation of a parallel write pulse to the buffer register DD16 (see the diagram in Fig. 2: the first edge of "CLK2") will be completed by the decay of the third pulse at the input of the "CP" counter DD6. On the decline of the fourth pulse at the input "CP" of the counter DD6, the element DD12.3 will switch to the state of a logical unit, which in turn will transfer the outputs of the IC EEPROM DD13 to the third (high-resistance) state (see the diagram in Fig. 2: front "OE" ).The decline of the fifth pulse at the input "CP" of the counter DD6 will switch the outputs of the buffer register DD16 to the active state (see diagram in Fig. 2: decline "SL"). The separation in time of the moments of switching on and off the output stages of the buffer register DD16 and EEPROM DD13 is necessary for the correct coordinated operation of the output stages of these microcircuits. As can be seen from the timing diagram of the reading mode (see Fig. 2), first, the outputs "D0" - "D7" of the EEPROM DD13 are turned off, then, after 1 cycle of the RF generator, the outputs "1" - "8" of the buffer register are turned on DD16. After another 2 cycles, the DD16 outputs are turned off, and, after another 1 cycle, - now, the DD13 outputs are turned on. On the decline of the 6th pulse at the input "CP" of the counter DD6, the simultaneous formation of pulses of reading ("CLK2") of the buffer register DD16 and writing ("CLK1") to the control registers DD18-DD21 begins. The formation of the write pulse (see the diagram in Fig. 2: the front "CLK1") in the registers DD18-DD21 will end 1 cycle before the end of the formation of the read pulse (see the diagram in Fig. 2: the second front "CLK2") of the buffer register DD16. As a result, the contents of the buffer register DD16 will be rewritten to the register DD18, and the contents of the latter will be sequentially rewritten to the register DD19, and so on. After the reading cycle of the current combination is completed, a negative drop is formed at the output "2" (pin 4) of the counter DD8.1, which, after limiting the duration by the differentiating RC chain C5R14 and inverting by the DD1.3 element, leads to resetting the counters DD6, DD7 and setting to the zero state of the 4th RS-flip-flop IC DD2. A low logic level from its output leads to blocking the operation of the RF generator assembled on the elements DD3.3, DD3.4. The output of the element DD3.4 is set to a constant level of logic zero. At the same time, the level of "zero", from the output "4Q" (pin 13) of the fourth RS-flip-flop DD2, switches the outputs of the control DD18-DD21 and output registers DD23, DD25, DD27, DD29 to the active state and allows the indication of the current light-dynamic combination. In this case, a code combination will be fixed at the outputs of the registers and, until the next positive pulse drop at the output of the low-frequency generator, it will be displayed on the LED line. CONSTRUCTION AND DETAILS. The main controller is assembled on a printed circuit board with dimensions of 100x150 mm (Fig. 3), and the output registers are 25x80 mm (Fig. 4) made of foil fiberglass 1,5 mm thick with double-sided metallization. The PCB drawings were developed for freehand drawing, which should make them easier to manufacture in an amateur radio laboratory. Connections shown with a dashed line are made with a thin stranded wire insulation. The device uses fixed resistors of the MLT-0,125 type, variables - SP3-38b, capacitors K10-17 (C1-C6, C8), K50-35 (C7, C9-C16); LEDs - super-bright, four colors, on the main controller board - 3 mm in diameter, and in a remote garland - 10 mm KIPM-15 type, placed in alternating sequence. Of course, other combinations of light-emitting elements are also possible. To control a more powerful load, for example, incandescent lamps or garlands of LEDs connected in parallel, the output registers must be supplemented with transistor or triac switches. Protective diode VD1 and decoupling (VD2, VD3) can be any medium power silicon. Buttons SB1-SB3, type KM1-1, and a switch, type MT-1, are soldered directly on the controller board. For them, holes of the corresponding configuration are provided. The output register microcircuits (DD22-DD29, see Fig. 5), which control the remote garland of light elements, as noted above, are connected to the main controller board with twisted pairs of wires. Their inclusion (taking into account additional inverting Schmitt triggers) is similar to the IC DD18-DD21 of the control register (see Fig. 1), but the data from the transfer output "PR" of the last IC DD29 of the output register is not used, since the output register only works in the receive mode ( download but not read) information. The remote garland of light elements, as well as the main controller, is powered from a separate stabilized 12 V source. The current consumed by the device does not exceed 600 mA (this is the peak value when all LEDs are lit at the same time), and when using the KR1533IR24 IC, it does not exceed 750 mA . Therefore, the power supply must have an appropriate load capacity. It is recommended to use a power supply with a minimum load current of at least 1A, especially for powering output (remote) registers. This will reduce the amplitude of the interference signal induced through the power circuit to the signal circuits of the register microcircuits. As mentioned earlier, the data in the output register (DD23, DD25, DD27, DD29) is transmitted via the signal lines of the serial interface: "Data" and "Synchronization". It should be noted that the elements of the KR1554 TL2 (74AC14) microcircuit, and not the KR1564 TL2 (74HC14), are used as buffer translators on the main controller board, since only the first of them is capable of providing a large output current (up to 24 mA) and directly control the capacitive load. With a short line length (up to 10 m), the clock pulse frequency is set to the maximum (100 kHz) and the trimming resistor R13 slider is set to the position corresponding to the minimum resistance. With a significant increase in the length of the line (more than 10 m), the amplitude of the interference signal induced in the signal lines by adjacent conductors increases. If the amplitude of the interference exceeds the switching voltage threshold of the input Schmitt triggers (taking into account the hysteresis), a communication failure may occur. To avoid such a situation, when the controller is operating on a relatively long line (from 10 to 100 m), it may be necessary to slightly reduce the frequency of the RF generator with resistor R13. In this case, the loading speed of light-dynamic combinations will decrease, but there will be no visual difference in the operation of the device, since the effect of LED flickering is completely masked by the "Indication enable" signal. Even with the lowest possible frequency of the RF generator (20 kHz), the maximum update time of the dynamic light combination will be 400 µs x 32 pulses = 12800 µs (12,8 ms), which corresponds to a refresh rate of about 78 Hz. This frequency is close to the ergonomic value of 85 Hz. Registers DD16, DD18-DD21 of type KR1564IR24 (direct analogue of 74HC299) used on the main controller board can be replaced by KR1554IR24 (74AC299), and, in extreme cases, KR1533IR24. Since the KR1533IR24 (SN74ALS299) microcircuits are of the TTLSH structure and consume a fairly large current even in static mode (about 35 mA), it is recommended to use CMOS microcircuits of the KR1564IR24 (74HC299) type in remote (output) registers. On the main controller board, it is possible to use registers of any of the KR1554, KR1564 or KR1533 series. If there is no EEPROM AT28C16-15PI, you can use the static type RAM KR537RU10 (RU25). In this case, if there is a need for long-term storage of the control program, it is necessary to use a backup power supply with a voltage of 3V, consisting of two elements of the LR03 (AAA) type, which is switched on through a decoupling germanium diode of the D9B type, as shown in [1]. The integral stabilizer DA1 (KR142EN5B), with the current-limiting resistors R17-R59 indicated on the diagram, does not need a radiator, but if super-bright LEDs are not available, you can use ordinary, standard brightness. At the same time, the values of the resistors R17-R59 must be reduced by three to four times, and the stabilizer should be installed on a radiator with an area of at least 100 cm2. The supply voltage of both the main controller board and the output registers can be selected in the range of 9-15V, but as it increases, it should be remembered that the power dissipated on the stabilizer ICs increases in proportion to the voltage falling on them. The switching frequency of light-dynamic combinations can be changed by adjusting the resistor R9, and the download speed, when working on very long lines, is R13. Programming technique Preparing the device for operation consists in entering dynamic light combinations into the EEPROM memory using the SB1-SB3 buttons. An alternative option is also possible: write a control program generated, for example, according to the method described in [4], using a standard programmer, and then install the EEPROM IC in a socket pre-soldered on the device board. As an example, consider programming the "running fire" effect. We will assume that the power was turned off before programming. Example 1. "Running Fire" effect. Turn on the power. LEDs HL3-HL11 should not glow (meters DD8.1, DD8.2, DD9.1 - in the zero state). The programming mode is indicated by the red LED HL2. Press the SB1 button once. Control the activation of the HL12 LED. Press the SB3 button once. (This will record the current combination with a simultaneous update of the contents of the control registers DD18-DD21). Press the SB2 button once. Control the extinction of the HL12 LED and the inclusion of HL13. Press the SB3 button once. Press the SB2 button once. Control the extinction of the HL13 LED and the inclusion of HL14. Press the SB3 button once. Repeat until the illuminated LED passes through all positions. During programming, pressing the SB3 button is accompanied by a change in the binary code combinations at the outputs of the counters DD8.1, DD8.2, DD9.1, which are displayed by the HL3-HL11 LED line. Another example of programming the "traveling shadow" effect is considered in [1]. As mentioned earlier, the device has the potential to increase the number of light elements. Due to this, the device can be used, for example, as a controller of a lighting display. The number of garland elements can reach several tens (it is convenient to increase them by a multiple of eight) without a significant change in the serial interface protocol. It is only necessary to set the required number of control and output registers and change the number of clock pulses accordingly. Naturally, it is necessary to take into account the change in the EEPROM address range corresponding to one dynamic light combination. If you need to control a garland with more than a hundred elements, you must use additional buffer registers. In this case, data transfer to the buffer registers will be carried out at a lower clock frequency, and the data will be rewritten to the output registers connected to their outputs after the data transfer cycle to the buffer ones is completed. This will allow you to transfer large data packets over the lines of the serial interface directly at the moment of displaying the current light-dynamic combination. Naturally, this will require some complication of the protocol. For all questions related to the implementation of a serial interface in dynamic light devices, you can get advice by sending a request to the author's e-mail address indicated at the beginning of the article. Literature:
Author: Odinets Alexander Leonidovich, Electronic_DesignArt@tut.by, Minsk, Belarus
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