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ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING Two-channel narrow-band VCO for adjusting the frequency response of quartz filters. Encyclopedia of radio electronics and electrical engineering
Encyclopedia of radio electronics and electrical engineering / Radio amateur designer When checking and establishing IF paths with quartz filters or individual quartz filters, most radio amateurs have a problem where to get the test signal. It is not always possible to measure parameters indirectly using receiver mixers. Not all available and relatively inexpensive precision, multifunctional measuring generators cover the frequency range of 30 ... 90 MHz, or the stability of conventional RF generators (with the GKCh function) will not allow you to accurately measure and adjust the characteristics of quartz filters. And most often there is simply no such equipment available, and it is unreasonable to buy an expensive generator only for these works. This article describes a two-channel voltage-controlled oscillator (VCO) with a small (several tens of kilohertz) tuning range, a center frequency of 2...90 MHz, an output impedance of 50 Ω, and an output signal of 100...300 mV swing. The device is designed to work as part of a frequency response meter instead of a GKCH, and can also work together with another sawtooth signal generator. In order to obtain stable operation of the VCO, inexpensive and affordable ceramic resonators for frequencies of 2 ... 12 MHz and further frequency multiplication were used as frequency-setting elements. Of course, the modern element base would allow solving the same problem on DDS generators or generators with a PLL (with a microcontroller and appropriate software), but then the complexity of such a device would exceed the complexity of the equipment under test. Therefore, the goal was to create a simple generator using available elements and not to manufacture inductors, and also to adjust the device using simple measuring instruments. The device is divided into separate functional units that can be mounted or not, depending on the needs of the owner. For example, if you have a multifunctional DDS generator, then you can not assemble generators and get to the final frequency with only frequency multipliers and the main filter. To avoid unstable operation, I recommend using only 74ACxx series CMOS microcircuits in the high-frequency part. The board of the device (Fig. 1) with dimensions of 100x160 mm is designed in such a way that it can be made one-sided (the top side, on which all elements are placed, except for wire jumpers) or two-sided, if you plan to use the device at frequencies above 25 MHz. The numbering of elements on the circuit diagram and the board begins with the number assigned to the node in which they are included. On fig. 2 shows the installation of elements on a single-sided version of the board. In this case, the pins of the microcircuit in the DIP package are soldered from the side of the printed conductors, which requires special care.
Ceramic resonators have good short-term frequency stability, which makes it possible to use their signal for setting up quartz filters and reliably measure their steep slopes. The interresonance interval of such resonators is an order of magnitude greater than that of quartz ones. They can be pulled in frequency by +0,3 ... -2% of the nominal value without any problems. In table. 1 shows the main parameters of piezoceramic resonators purchased in 2015 in Russia, and their frequency tuning range for the case of building a generator on the logic elements of the 74AC86 microcircuit. Table 1
1) P - resonators of the ZTA series, PC - resonators of the ZTT series (with built-in capacitors), D - discriminator (for use in FM detectors). 2) With two 280pF capacitors. 3) With two 20pF capacitors. Ceramic resonators for higher frequencies (more than 13 MHz) are obviously manufactured using a different technology, and their frequency tuning range is very small. The ZTT series resonators have built-in capacitors, and therefore it is much more difficult to tune them in frequency, and it is not always possible to obtain the nominal frequency. In table. Table 2 shows the most common IF frequencies in various radio receivers (RPUs) and transceivers, as well as options for generating these frequencies using ceramic resonators. An analysis of the necessary multipliers or divisions will reveal the need to apply multiplication by two to expand the number of options and ensure signal quality. Table 2
To understand the operation of the proposed frequency multipliers, I will briefly present the important parameters of the spectra of the output signals of the logical CMOS elements of the 74AC series. These high-speed elements operate at a supply voltage of 2 ... 6 V, and without a capacitive load, the minimum duration of the front of the output pulses is 1 ns, which makes it possible to obtain significant spectral components up to a frequency of 250 MHz. At the same time, the output impedance of the elements is about 25 ohms, which makes it easier to obtain significant energy from higher harmonic components. The transfer characteristic of the logic elements of this series is symmetrical, and the output stage has the same load capacity and switching speed for the outgoing and incoming current. Thus, the output signal of logic elements and flip-flops of the 74ACxx series up to frequencies of 30 MHz can be considered ideal, and all the laws of mathematics related to the spectra of pulsed signals can be applied in practice with high accuracy. Rectangular signal with the same pulse duration tи and pauses tп the so-called meander (duty factor Q = T/tи \u2d XNUMX, where T is the pulse repetition period T \uXNUMXd tи+tп, but sometimes the term "filling factor" is used, the inverse of the duty cycle K \u1d XNUMX / Q), contains in the spectrum, except for the first harmonic (F1 = 1/T - fundamental frequency), and odd harmonics (2n+ 1)F1, where n = 1, 2, 3.... In practice, suppression of even harmonics can reach 40 dB without the use of special measures, and in order to obtain suppression up to 60 dB, it will be necessary to ensure long-term stability of the parameters of the elements using CNF and with additional careful adjustment. Experience has shown that frequency dividers by two (D-flip-flops and JK-flip-flops of the 74ACxx series, as well as the frequency divider 74AC4040) at frequencies up to 4 MHz provide such suppression up to 60 dB. At an output frequency of 30 MHz, it decreases to 30 dB, and at frequencies above 100 MHz, there is no pronounced suppression of even harmonics. Therefore, the square wave is of particular importance in frequency multipliers due to the relative purity of the spectrum, which simplifies subsequent filters. For this reason, the proposed device provides elements for adjusting the symmetry of the signal. The almost ideal output characteristics of the 74ACxx series elements allow, without the use of a spectrum analyzer, using adjustment elements, to obtain the desired signal shape by measuring the average DC voltage at the output. Suppression of even harmonics up to 40 ... 50 dB at frequencies up to 20 MHz is obtained without problems. Measurement of the duty cycle (duty cycle) of the output signal can be carried out using a digital multimeter in the DC voltage measurement mode (Rvh ≥ 10 MΩ), without changing the measurement limit (Fig. 3). First, the multimeter is calibrated, for this it is connected through a resistor with a resistance of 33 ... 100 kOhm to the power lines (directly to the corresponding terminals of the microcircuit). Since the input resistance of the multimeter is 10 MΩ, its readings (Uк) will be 0,3 ... 1% less than the supply voltage. The resistor, together with all the capacitances of the wires and the input of the multimeter, form a low-pass filter for a high-frequency signal. If there is a pulse signal with Q = 2 at the output of the logic element, the multimeter will show UO = 0,5Uк. On fig. 4 shows the signal spectrum at the output of the 74AC86 microcircuit generator without special balancing measures, the suppression of the second harmonic in relation to the first is about 36 dB. This is not very good for working with frequency multipliers.
If you break the symmetry of the output signal, you can achieve suppression of other spectral components. For example, at Q = 3 (Fig. 5), harmonics that are multiples of three are suppressed in the output signal (Fig. 6). The establishment of such a mode is also carried out using a multimeter, only it is necessary to obtain the average voltage UO = 0,333Uк (or 0,666Uк). This option is especially interesting if you need to get a multiplication by two or four. At higher harmonics, filter costs already make this option difficult to implement.
Thus, the square wave is ideal for obtaining the odd harmonics of the signal, up to the seventh. The higher ones are already heavily attenuated, and extracting them would require complex filters and amplifiers. The second and fourth harmonics are best obtained with an output signal duty cycle Q = 3. If all near harmonics are needed in the spectrum, Q = 2,41 (K = 41,5%) must be adjusted. Here follows an important remark. Sometimes it happens that interference from the local oscillator PLL or microcontroller “wanders” in the receiver. Skillful selection of the duty cycle of the clock signal can suppress some of the interfering harmonics. But in general, the overall background of harmonics from the clock signal can be reduced if its duty cycle is set to exactly Q = 2 by default. The proposed device mainly uses logical CMOS elements operating in a linear mode. For this, the inverter mode is used (if the element is two-input, the second input is connected to a common wire or power line) and DC feedback is introduced (Fig. 7) to maintain the operating point in the middle of the transfer characteristic. Resistor R3 provides OOS, and with the help of resistors R1 and R2, you can shift the position of the operating point on the transfer characteristic. This scheme also makes it possible to balance logic elements of the 74xCTxx series, which have a switching threshold of about 1,2 V (at a supply voltage of 3,3 V). The criterion for the correct setting is the establishment of the output voltage at 50% of the supply. The resistance of the resistor R2 is chosen as large as possible so that it has less effect on the input signal circuits.
The steepness of the transfer characteristic corresponds to a voltage gain of 30...40dB. Therefore, an input signal with a voltage of several tens of millivolts already leads to a change in the output from zero to a maximum. To reduce noise when switching from one state to another, it is necessary to provide a certain signal slew rate at the input (for the 74ACxx series - about 125mV/ns). In this case, there is a lower limiting frequency at which no interfering noise or self-excitation occurs during the passage through the active section of the characteristic. If a parallel LC circuit is enabled at the gate input, lower frequency input signals are allowed without generating noise. With a supply voltage of 3,3 V at a frequency of 3 MHz, the minimum voltage swing is 0,5 ... 1 V. To operate at lower frequencies, logic elements of the 74HCxx, MM74Cxx, 40xx series must be used. Based on the EXCLUSIVE OR element (IC 74AC86), you can easily make a frequency multiplier by two, if the signal is applied directly to one input, to the other input through the delay line based on the RC circuit (Fig. 8). If the time constant of the RC circuit (τ) is significantly less than the pulse repetition period T, we will get short pulses at the output with each drop in the input voltage, i.e., the number of pulses (and hence their frequency) has doubled. With an increase in the delay (time constant of the RC circuit) on the capacitor C1, the signal becomes triangular and its amplitude decreases, so the switching accuracy decreases and the signal quality deteriorates - the fronts "float" with noise. Such a multiplier operates stably at τ < 0,2T. It is very important for him that t1 = t2. In this case, the input signal is a meander (Q = 2), and then the signal with the input frequency will be suppressed at the output of the multiplier (up to 40 dB).
An even purer spectrum of the output signal will be in the case of Q = 3 (Fig. 9). In this case, the multiplier will "give out" harmonics at frequencies 2F at the output1, 4F1, 8F1, 10F1, 14F1, 16F1 etc.). Only harmonics at 2F are of practical importance.1 and 4F1, and the suppression of harmonics with frequencies F1, 3F1, 5F1 and 6F1 helps out. With this setting, the output should be UO = 0,333Uк.
If the task of the VCO is to generate a signal for establishing a quartz filter, then the question may arise, is it not enough to apply a pulse signal from the output of the logic element directly to the quartz filter (through a resistive matching attenuator)? After all, the filter itself will suppress other harmonics. In some cases this is possible, but the biggest and most unpredictable pest is the main harmonic with a lot of power. It can easily "bypass" the filter and cause a lot of background signal in a broadband detector. The energy of the remaining harmonics in total is also large and the consequences are the same. In addition, many high-frequency crystal filters operate at harmonics (mainly at the third) and at the same time have spurious transmission channels near the fundamental frequency, through which the test signal can penetrate and cause distortion on the frequency response on the screen, which is not really there. Therefore, I recommend not to abandon the filter at the output of the frequency multiplier - this is one of the most important elements that will ultimately determine the quality of work on the RPU. For an example in fig. Figure 10 shows the spectrum of the signal (see Figure 4) after it has passed through a two-loop LC filter. The seventh harmonic (55846 kHz) remains at the output, the fifth is suppressed by 30 dB, and the main one is more than 42 dB, so they will interfere little with high-quality measurements.
The block diagram of the measuring generator is shown in fig. 11. The circuit provides two generators (G1, G2) of the same design to expand the functionality of the device. After them, an intermediate frequency multiplication occurs in the frequency multiplier U1 or frequency multiplier U2. The multiplication factor is one, two, three or four. In addition, in the multiplier-divider U1, the frequency of the signal can be divided by two or four before multiplication. In the mixer at the output of the element DD1 and after the low-pass filter Z3 (cutoff frequency - 100 kHz), a signal is generated at a frequency of F = | n1Fgong1 - N2Fgong2|. The mixer also works on harmonics.
Elements DD2, DD3, Z1 and Z2 work in the modulator, they form the necessary duty cycle of the signal for the last stage of multiplication. With a duty cycle Q = 2, the elements Z1 and Z2 are not needed. DD4 and DD5 work as buffer amplifiers, in addition, they can be pulse modulated. Generator G3 generates short pulses to simulate impulse noise, it is activated by a high level of the SPON signal. If its frequency is reduced by 100 ... 1000 times (by increasing the capacitance of the corresponding capacitors), it is possible to adjust the dynamics of the AGC or noise suppressor in the RPU. With the help of filters Z4 and Z5, the desired harmonic is selected, and amplifiers A2 and A3 give the signals the required level. A combined signal can be generated at the GEN-3 output using jumpers S1 and S2. The power supply unit (PSU) provides 3,3 V to the device nodes, and there is also a +3,9 V voltage output for powering low-power equipment under test (TECSUN, DEGEN radio receivers, etc.) +5 V voltage from USB can be supplied to the power supply input - port or charger of a cell phone, as well as from an unstabilized mains power supply with an output voltage of 5 ... 15 V. The current consumed by the device depends on the frequency of the generators and does not exceed 70 mA in the complete set. master oscillators The VCO circuit for the variant with output frequencies of 55845 and 34785 kHz is shown in fig. 12. In contrast to the simple well-known "computer" circuit of a quartz oscillator based on logic elements, varicap assemblies VD100, VD101 (VD200, VD201) are used here for frequency tuning. In each assembly for the RF signal, the varicaps are connected in series. This allows you to reduce the signal voltage on each of them and apply a relatively small control voltage.
The choice of varicaps depends on the operating mode of the resonator. If the master oscillator (MG) is required to operate at a frequency (Fsg), which is higher or close to the nominal frequency of the resonator, varicaps with a maximum capacitance of up to 40 pF (KV111, BB304) are suitable. If you plan to rebuild the frequency by several tens of kilohertz below the nominal value, the board provides places for installing additional assemblies of the same type. And if the frequency is already 100 kHz less than the nominal one, varicaps will be required, in which, at a voltage of 2 V, the capacitance is about 150 pF (BB212). Using tuning capacitors C102, C107 (C202, C207), you can shift the frequency scan range depending on the control signal at the "SCAN-1" ("SCAN-2") input. A control voltage of 1 ... 2 V can be applied to the frequency control input "SCAN-0" ("SCAN-15"). In this case, the voltage on the varicaps will vary from 1,65 to 9,15 V, and the modulation characteristic of the VCO has a satisfactory linearity. To activate (switch on) the generator, you must install the jumper S100 "EN1" (S200 "EN2"). Trimmer resistor R106 (R206) serves to balance the output signal - to obtain a meander. On the element DD100.3 (DD200.3), you can assemble a buffer stage or a frequency multiplier by two. In the first case, it is enough not to install the resistor R111 (R211). Secondly, a selection of capacitor C109 (C209) will be required to obtain the best quality signal at a specific frequency. The capacitance value of this capacitor indicated in the diagram is suitable for multiplication from 3 to 6 MHz and can be proportionally changed for other output frequencies from 2 to 16 MHz. The trimmer capacitor C108 (C208) sets the maximum purity of the output signal spectrum (optimum duty cycle Q = 3). In the first ZG, frequency dividers are assembled on triggers DD101.1 and DD101.2, and using switches S100.1 - S100.4 at the output (XT100) you can set a signal with frequencies of 0,25Fsg, 0,5Fsg, Fsg, and 2Fsg. If there is no need to switch the frequency, instead of the switches, you must install the required jumper, and do not install the DD101 chip. The mode of broadband multiplication by two is achieved due to the RC circuit R111, C108, C109 (R211, C208, C209). To isolate the signal at the required frequency, an LC circuit was used, consisting of elements L100, L101, C113 and C114 (L200, L201, C213 and C214). To highlight the second harmonic, the ratio of the inductances of the coils L101 and L100 (L201 and L200) should be 3: 1, to highlight the fourth - 6: 1, and for the third (Q \u2d 4) - about 1: 3. For frequencies 5 ... 10 MHz, the total inductance should be 6 ... 20 μH, for a frequency of 2 MHz - about 114 μH. The circuit is tuned to resonance using a trimmer capacitor C214 (C117). It is undesirable to determine the resonance by controlling the signal amplitude directly on the circuit itself due to the influence of the measuring device. The best way to do this is to “break” the meander at the output of the DD214 (DD100.4) element using the resistor R200.4 (R2), then at resonance (this is the maximum amplitude of the sinusoidal signal), the duty cycle of the output signal approaches Q = 2, then this resistor sets the exact value of Q = 101 at the output of XT201 (XTXNUMX). When operating at the fundamental frequency, the elements of this LC circuit and balancing elements are not installed, and the output of the DD100.3 (DD200.3) element is directly connected to the input of the DD100.4 (DD200.4) element. Resistors R106 and R206 set Q = 2 at the output of XT101 (XT201). Modulator Elements DD301.1 and DD301.3 of the modulator are configured depending on the desired frequency multiplication factor, which requires an accurate setting of Q = 2 in the previous stages. When multiplying by an odd number of times, it is not necessary to set the RC delay circuits, and the same signal is applied to both inputs (R307, R309, C302-C305 are not set). To multiply by two or four, these circuits set Q = 3 at pin 11 of the DD301.1 element and at pin 3 of the DD301.3 element. In the element DD301.2 (DD301.4), pulse modulation is carried out. From its output through the resistor R400 (R500), the signal enters the main filter. Therefore, the board directly with this element provides for the installation of two blocking capacitors. Without them, there will be a noticeable effect on other nodes through the power lines. The board provides resistors R308, R310 and R311, connected to a common wire or power line, which can be used if these inputs are signaled from an external source. A pulse generator is assembled on the DD300 chip to generate a signal with a duty cycle of up to Q ≈ 1000. The frequency of the modulating signal in the range of 0,1 ... 1 kHz is set by resistor R301. The pulse duration (8 ... 80 μs) is set by resistor R302. Such parameters are optimal for setting up noise blanker systems. By setting the "SPON" jumper, pulse modulation of the RF signals is activated. For the convenience of working with the oscilloscope, a "SYNC" signal with an amplitude of 1 V is generated. To check the response of the AGC or squelch in the RPU, you need to change the modulation timing parameters. To do this, capacitors C300 and C301 are selected, their capacitance can vary widely, it is permissible to use oxide capacitors, taking into account their polarity (minus - to a common wire). Main filter The most powerful spectral component is at the fundamental frequency of the MO, and it must be eliminated first of all because of its relatively high power. Therefore, the main double-circuit filter on the elements L400-L403 and C402-C407 (L500-L503 and C502-C507) "begins" with the inductor L400 (L500). Compared with the option with a capacitor, with the same number of elements, you can get a gain in suppression of the first harmonic by 10...16 dB. A selection of capacitor C404 (C504) establishes a connection between the circuits no more critical. Approximately its capacitance should be 20 ... 30 times greater than the capacitance of the loop capacitor Cк = C402 + C403 (C502 + C503). This ensures optimum suppression of interfering harmonics. The element ratings are specified for the filter tuning frequency of about 35 (56) MHz. The frequency response of these filters is shown in fig. 13 and fig. 14 respectively. You can change the filter tuning frequency, for example, reduce it, by proportionally increasing the inductance of the coils and the capacitance of the filter capacitors.
For the frequency range of 4 ... 90 MHz, EC-24 series chokes can be used. Capacitor C407 (C507) is selected to obtain a voltage swing based on the transistor - 30 ... 60 mV. For the 10,7 MHz center frequency option, you can even do without inductors. Instead of the main LC filter, a piezo filter with a bandwidth of 180 ... 350 kHz is installed from the IF path of the VHF receiver. The diagram of its connection in the second channel is shown in fig. 15. The nominal resistance of the resistor R500 (820 ohms) is indicated for the case of a signal at a frequency of 3566 kHz. If the frequency is 2 ... 3 MHz, the resistance must be reduced to 620 ohms. Resistors R2-R4 provide a load resistance of 330 ohms for the ZQ1 filter, which is important to ensure minimal frequency response unevenness in the frequency range of 10700 ± 50 kHz. Resistor R4 increases the stability of the amplifier at high frequencies.
The amplifier on the transistor VT400 (VT500) (see Fig. 12) at a load of 50 ohms provides a signal with a swing of up to 300 mV. In order to ensure a linear mode at the same time, the collector current of the transistor should be about 10 mA, it is set by selecting the resistor R401 (R501). The gain is approximately 14 dB (5 times). To adjust the filter using a multimeter, a VD400 (VD500) diode detector is installed at the output of the amplifier. The 1N4148 diode operates satisfactorily up to 45 MHz. For higher frequencies, it is desirable to use low-power high-frequency germanium diodes or Schottky diodes (BAT or BAS series). Adjust the filter for the maximum signal at the output of the detector. The adder circuit (L504, C512-C515, R507-R509) does not indicate the values of the elements, since the layout is highly dependent on the specific task. This offers a wide range of possibilities for summing signals. The adder cannot replace a high-quality two-frequency generator for measuring intermodulation distortion and IP3, since both signals have already "crossed" in the modulator through the common power supply pins of the DD301 chip. Nevertheless, such distortion can be measured up to 30 dB, which in most cases is enough to adjust the RF nodes for a minimum of distortion. The mixer on the DD700 chip is provided primarily for the formation of a frequency marker on the oscilloscope screen when studying the frequency response of the filter. In this case, one generator operates as a reference without scanning, and its frequency is measured by a frequency meter. When equal to the frequency of the scanning oscillator, a zero beat is formed, which is well observed on the screen. By this method, in a modest home laboratory, you can quite finely tune the filter to the required frequency. But the mixer can be used for other purposes. Since it works well on all harmonics, it is possible to implement a grid of markers (as in the X1-48 frequency response meter and similar ones). Depending on the specific task, you will have to select the parameters of the low-pass filter R700, C700, R701, C701. If only one signal is applied to the mixer (turn off the second generator), this signal will be at the output. VCO Implementation Examples When choosing a variant, it is necessary to take into account the presence of resonators, and variants with the use of an intermediate frequency divider by two (or four) or multiplication by two (at Q = 3) are always more preferable. The reason for this is the absence in the intermediate spectrum (contacts XT400 and XT500) of the first harmonic of the CG, which eliminates the back reaction to the generator ("jumps" in frequency when the load changes). For crystal filters operating at the third harmonic, it is desirable to avoid options with a multiplication by three in the second multiplier. In the master oscillator, due to the use of microcircuits of the 74AC86 or 74NS86 series, it is possible to shift the operating interval of the resonators by several tens of kilohertz. On 74AC86, the frequency will always be slightly higher and the frequency stability is noticeably better. For 74NS86 microcircuits, the transfer characteristic threshold is shifted to 33% of the supply voltage, which is inconvenient for implementing options with complex intermediate conversions. 4433 kHz Filters for this frequency in most cases are made on the basis of quartz resonators for PAL decoders. Such filters are popular with radio amateurs, since resonators are available and relatively cheap, and in one batch they have a small spread of parameters. They make quite "serious" SSB/CW filters. A good option with high stability is to use a resonator at 3580 kHz (set to 3546 kHz) and then divide by four and multiply by five. 5500 kHz You can generate a signal with a frequency of 5500 kHz if you use a resonator at a frequency of 11 MHz in the MO and then divide the frequency by two. In this case, we obtain a pure spectrum and a weak effect on the MO. Instead of the main LC filter, you can install a piezo filter at a frequency of 5,5 MHz, used in the sound path of the TV (see Fig. 15). 8814...9011 kHz The frequency in the range of 8814 ... 9011 kHz can be obtained by using resonators at a frequency of 6 (12) MHz, followed by its division by two (four) and multiplication by three. You can also use a resonator with a nominal frequency of 3580 kHz, tune it to a range of 3525 ... 3604 kHz, then divide the frequency by two and multiply by five. Resonators with a nominal frequency of 3 MHz are not the best option, since the third harmonic of the ZG falls into this range when used. 10700 kHz With a discriminator resonator at a frequency of 10700 kHz in the MO, you can immediately get the required signal, but the mutual influence of the MO and the output UHF can spoil the result of measuring the frequency response of SSB filters with very steep slopes. The best result can be obtained with a 3,58 MHz resonator (tuned to 3567 kHz) and multiplied by three. With a 4300kHz resonator (tuned to 4280kHz) and then dividing by two and multiplying by five, we get a very stable signal for setting up SSB filters. According to experience, for this it is necessary to purchase several resonators, since they have dips in impedance in the frequency range of 3,5 ... 4,5 MHz, and choose the most "smooth" one. 21400 kHz Using a resonator at a frequency of 3,58 MHz (tuning to 3567 kHz) and multiplying by two, we get a signal with a frequency of 7133 kHz, the third harmonic (21400 kHz) will be selected by the main filter. A discriminator resonator at a frequency of 10700 kHz with subsequent doubling will also work well. To do this, use the DD301.1 element and set Q = 3 at its output (R307 = 1 kOhm, C302 + C303 = 15 pF) (Fig. 16).
When adjusting with a multimeter, you can get a signal suppression at a frequency of 32100 kHz of at least 40 dB. With a spectrum analyzer, suppression can be adjusted up to 50 dB. The quality of the signal after the main filter will allow you to measure the frequency response of filters in the range up to 80...90 dB. 34875 kHz The frequency of 34875 kHz is best obtained by using a 10 MHz resonator in the MO and tuning it to 9939 kHz, then dividing by two and multiplying by seven. The second option is to set the resonator to a frequency of 3,58 MHz (tuning to 3487 kHz) with an intermediate multiplication by two and a final multiplication by five. This option is good because the filter selects the fifth harmonic better than the seventh. A careful setting of Q = 2 will definitely be required. 45 MHz At first glance, there are many options for this frequency, but most require a final multiplication by three, which is not always good. The best options are to get 9 MHz first (followed by five) or 6428 kHz (followed by seven). A frequency of 9 MHz can be reached by using a discriminator resonator at a frequency of 4500 kHz with a preliminary frequency doubling or with 3, 6, 12 MHz resonators divided by two (four) and multiplied by three. An intermediate filter of 9 MHz in the case of frequency multiplication by two is implemented using inductors L100 = 1,5 μH and L101 = 4,7 μH. When multiplying the frequency by three, you need to set L100 = 1 μH, capacitor C113 = 39 pF. At resonance, a 100.4 V signal is present at the input of the DD1,5 element, which is quite enough to trigger the logic element. The main prerequisite for obtaining a clean spectrum when multiplying the frequency by three is the signal from the ZG with Q = 2. If the signal comes from the output of the frequency divider on the trigger DD101.1 or DD101.2, this will happen automatically. Without a divider, you need to set the signal ZG with Q = 2. When multiplied by two, you also need to get a signal with Q = 2 at the output of element DD100.1, and set Q = 100.3 in the multiplier (output of element DD3) using capacitor C108. Then tune the filter to resonance. To do this, first, using the resistor R117, the balance of the DD100.4 element is disturbed in order to obtain a signal with a variable duty cycle at the output of the DD100.4 element (Fig. 17). The different pulse durations are due to the fact that at a frequency of 9 MHz, new energy enters the circuit only with every third pulse.
By setting the filter to resonance, we get a signal whose duty cycle is already closer to Q = 2 (Fig. 18). At resonance, the multimeter reading is as close as possible to 50% of UK. With a full turn of the trimmer capacitor, we should notice this phenomenon twice and at the same time note a clean signal at a frequency of 9 MHz at the output.
Finally, with the help of the resistor R117, Q = 2 is restored. Check this with a multimeter on the XT400 contact, setting the voltage to exactly 50% of UK. In this case, the subsequent filter should be temporarily disabled. In this case, on the XT400 pin, we will receive an intermediate signal with a frequency of 9 MHz, in which even harmonics are suppressed by 40 dB, and multiplying by 45 MHz does not cause any particular difficulties. 55845 kHz The solution to this problem will provide a resonator at a frequency of 8 MHz (tuning to 7978 kHz). But careful setting of Q = 2 at the input of the main filter will be required to suppress the even, as well as the fifth and ninth harmonics. Another option is to use a resonator at a frequency of 3680 kHz (tuned to 3723 kHz) with an intermediate multiplication by three (11169 kHz) and then by five. 60128 kHz The easiest option is to use a 12 MHz resonator (tuned to 12026 kHz) multiplied by five. You can apply a resonator to a frequency of 6 MHz by applying a preliminary multiplication by two. An intermediate filter for a frequency of 12 MHz consists of inductors L100 = 1 μH and L101 = 3,3 μH, capacitor C113 = 33 pF. 64455 and 65128 kHz The use of a discriminator resonator at a frequency of 6,5 MHz (tuning to 6445 kHz) will probably provide the best option in terms of availability and stability. Multiplying by two and by five "we go" to the frequency of 64455 kHz. To obtain a frequency of 65128 kHz, we tune the ZG to a frequency of 6,513 MHz. For an intermediate filter at a frequency of 13 MHz (after multiplying by two), you will need to set L100 \u0,82d 101 μH and L2,2 \u113d 39 μH, capacitor CXNUMX \uXNUMXd XNUMX pF. 70200 and 70455 kHz The easiest option is to use a resonator at a frequency of 10 MHz in the MO (setting 10030, 10065 kHz). But not all resonators will "reach" up to a frequency of 10050 kHz. To obtain a frequency of 70455 kHz, you can use a resonator at a frequency of 3,58 MHz (tuning to 3523 kHz). After multiplying by four, we “go out” to a frequency of 14091 kHz and then multiply by five. Let's consider this option in more detail, since it requires careful step-by-step adjustment. First you need to get Q \u2d 118 in the ZG, it is advisable to increase the resistance of the resistor R215 (R330) to 3 kOhm in order to increase the long-term stability of the setting. Then set Q = 14 at the output of the first multiplier to obtain the maximum level of even harmonics. The intermediate filter is tuned to a frequency of 100 MHz. To do this, set L0,18 = 101 μH and L1 = 113 μH, capacitor C100 = 114 pF, C6 - trimmer 30 ... 212 pF, resistor R820 = 7 ohms. The circuit has a high quality factor, and the spectral line at a frequency of 40 MHz is suppressed by 117 dB. After balancing with resistor R70, we get a spectrum in which there are no even harmonies from the main signal and the signal at a frequency of 26 MHz is XNUMX dB higher than all the others. The output filter is set to L400 = 27 nH (size 0805 or 0603). Loop coils (L401 and L402) - 0,47 μH each (EC-24 inductors), and capacitors - with a total capacity of 11 pF. The total capacitance of the capacitor C404 is 250 pF, C407 = 82 pF. The resulting bandwidth is about 2 MHz, the signal with a frequency of 14 MHz is 40 dB less than the signal with a frequency of 70 MHz, at a frequency of 42 MHz the relative suppression is 46 dB, at a frequency of 140 MHz it is 26 dB. Output signal swing ("GEN1") - 400 mV. The short-term frequency instability is about ±50 Hz. For 10 minutes, the frequency changes slowly in the range of ±200 Hz. These values can be reduced by shielding, as the air currents in the room have a noticeable effect. This is enough to set up filters with a bandwidth of more than 5 kHz. The dependence of the frequency on the load resistance is practically not manifested. The variant with a resonator for a frequency of 10 MHz turned out to be 2...3 times more stable. Probably, with this example, we went through the "high school" of working on RF with logic elements of the 74AC series CMOS and well "felt" the limits of this technique when implementing multipliers for high frequencies with minimal means. 80455 kHz With an 8 MHz resonator (tuned to 8045 kHz) and a primary frequency doubling, we get 16090 kHz. Subsequent multiplication by five will give the desired result. 90 MHz The most reliable option is to use a resonator at a frequency of 12 MHz. An intermediate division by two will give a stable signal at a frequency of 6 MHz with suppression of even harmonics up to 50 dB. After a preliminary multiplication by three, we will reach a frequency of 18 MHz. In this case, inductors L18 = 100 μH and L0,56 = 101 μH and capacitor C2,2 = 113 pF are installed in the intermediate filter (at 12 MHz). At a frequency of 90 MHz, the KT368AM transistor works well and will output a signal with a swing of 400 mV and 200 mV to a load of 50 ohms without load. The second harmonic (180 MHz) occurs at UHF and is suppressed by 20 dB. The main filter has L400 = 15 nH (size 0805), L401 = L402 = 0,27 μH (EC-24), 11 pF loop capacitances, capacitors C404 = 300 pF, C407 = 68 pF. On fig. 19 shows the frequency response of this filter with a bandwidth of 4 MHz at a level of 3 dB. In this version, excellent short-term stability was obtained, and during the first hour of operation, the frequency increased smoothly by 1 kHz if the VCO board was installed in a closed case. Then the frequency slowly changes in the range of ±100 Hz.
135,495 MHz To reach such a high frequency, it is better to use quartz resonators at a frequency of 15 ... 20 MHz (first harmonic), which provide a tuning of 5 ... 8 kHz. But it will be more reliable if you apply a signal from a budget DDS generator with a frequency of 9022 or 15055 kHz to the input of the DD100.1 (DD200.1) element. To obtain a sufficient signal level at 135 MHz, one must strive for a sufficiently high frequency after the first multiplication (27 or 45 MHz). The output filter can be implemented on the HDF135-8 SAW filter, which has good suppression at frequencies up to 100 MHz. To match, it is necessary to install an RC circuit (1 pF + 68 Ohm) at its output and, from the side of the modulator (DD301), use a resistive attenuator to provide an impedance of 50 Ohm. Signals up to 240 MHz In this example, I want to show the potential of the applied elements. For example, the ZG operates at a frequency of 12 MHz. The multiplier on the DD100.3 is set to Q = 3 and outputs 24 MHz pulses to the LC circuit. It is very important to fine-tune the filters with a spectrum analyzer (or with the same success - a multimeter). The tuning technique is the same as for the 9 MHz filter, but L100 = 0,56 μH and L101 = 2,2 μH, capacitor C113 = 6,8 pF. At the output (XT400) there is a signal with a spectrum in which odd harmonics from 50 to 24 MHz are suppressed (at least 300 dB) (due to the good topology of the board around DD301). The signal at 168 MHz is about 18 dB weaker than the main signal (24 MHz), and there is still a significant level at 240 MHz (-26 dB). The proposed VCO can be conveniently applied in conjunction with a sawtooth voltage generator and a logarithmic detector (AD8307 chip). The operation of CMOS elements at RF in combination with LC circuits opens up unique opportunities in the development of QRP equipment. The logic elements of the 74AC series have low phase noise if, at frequencies of 20 ... 120 MHz, a sinusoidal signal is applied to their input, equal in amplitude to the supply voltage. Elements of the 74HC series are less suitable for this. Additional information, as well as PCB drawings in different formats: ftp://ftp.radio.ru/pub/2016/05/GUN.zip. Author: Ayo Lohni
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