D-trigger. Scheme, description

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D-trigger. Radio - for beginners

Radio - for beginners

Of the several varieties of D-flip-flops in the K155 series, the most popular among radio amateurs are the triggers of the K155TM2 chip (Fig. 1, a). It has two D-flip-flops connected by a common power circuit, but working independently of each other. Each of them has four logical inputs and two outputs - direct and inverse.

Input D is the input for receiving digital information, and C is the input for clock synchronization pulses, the source of which is usually a square-wave generator. At the R and S inputs, the D-flip-flop works in the same way as the RS-trigger: when a low-level voltage is applied to the R input, the D-trigger is set to the zero state, to the single state at the S input. On inputs D and C, it can act as a memory cell of received information or as a flip-flop with a counting input.

D-flip-flops of the K155TM2 chip on the circuit diagrams of digital technology devices are usually not depicted together, as in fig. 1, a, a separately in different parts of the circuits (Fig. 1, b). In this case, it is allowed not to show the conclusions that are not used in the device. We will adhere to these rules.

Rice. 1 D-trigger K155TM2

We offer several experiences and experiments that will help to comprehend the logic of the D-flip-flop in different operating modes.

Place the K155TM2 chip on the breadboard, connect pin 14 to the positive, and pin 7 to the negative power wire. To the terminals of the direct and inverse outputs of one of its D-flip-flops, for example, to terminals 5 and 6 (Fig. 2, a), connect LED (or transistor with incandescent lamps in collector circuits) indicators, by the glow of which you will judge the logical state trigger. Connect the same indicator to pin 3 - to input C. You will observe the appearance of and by the glow of this indicator. the duration of the synchronization clock pulses. On the panel, also mount the push-button switch SB1 and the resistor R4, but do not connect this circuit to the input D (pin 2) of the trigger yet.

Turn on the power. Immediately one of the LEDs connected to the trigger outputs should light up. If this is the HL3 LED, then the trigger is in a single state, and if HL2 is in zero. Now alternately short-circuit several times, first output 1, and then 4 (inputs R and S) to a common wire. Such experience will convince you that the D flip-flop works the same way as the RS flip-flop on these inputs.

Rice. 2 Experience with D-trigger

Next, connect a resistor R2 with a push-button switch SB4 to the information input D (pin 1), Record the initial state of the trigger, and then press this button several times in a row. How does the trigger react to this? No way - the same indicator continues to shine. By briefly connecting the input R or S with a common wire, switch the trigger to another stable state and again press the SB1 button several times. And now, as you can see, the trigger does not respond to input signals. This is because there is no high-level clock at input C.

The source of synchronization clock signals for experimental verification of the D-flip-flop can be a variable frequency test pulse generator. Connect its output to input C of the trigger (pin 3), set the maximum duration of the generated pulses and, after turning on the power, watch the input indicators. If before that the trigger was in the zero state, and the contacts of the SB1 button were open, then by the positive voltage drop of the first pulse at input C, the trigger should switch to a single state and not respond to subsequent clock pulses. But it is worth pressing the button to apply a low-level signal to the information input, and the trigger will immediately switch to the opposite state along the edge of the next clock pulse.

The operation of the D-flip-flop in this mode is illustrated by the graphs shown in Fig. 2b. We believe that at the beginning of the experiment, when the contacts of the SB1 button were not yet closed and, therefore, the signal at input D corresponded to a high level voltage, the trigger was in the zero state (low on the direct output, high on the inverse output). The first positive voltage drop at input C switched the trigger to a single state. I didn’t react to the next positive trigger on a negative drop and kept the accepted state.

Then press the SB1 button to change the input level. As a result, the third clock pulse immediately switched the flip-flop to the zero state, which remained until the arrival of the sixth pulse, when the button was released and there was already a high-level signal at the input D. Further, when the level of the input signal changed, the trigger switched to the zero state on the edge of the seventh clock pulse, and on the edge of the eighth - to one.

These experiments and graphs, characterizing the logic of the D-trigger in the mode of receiving information, allow us to draw some conclusions. If the signal at input D is high, the trigger on the positive voltage drop of the clock pulse at input C is set to a single state, and if it is low, then to zero. The D-trigger does not respond to the decline in the synchronizing pulses. Each changed state of the trigger means a record of the received information in its memory, which can be read or transmitted for decoding to another logical device of digital technology.

The next experiment is to test the D-trigger in counting mode, i.e., as a trigger with a counting input. To do this, disconnect the resistor R4 from the input D with the push-button switch SB1 and connect it to the inverted output, as shown in fig. 3a. Now the information input of the trigger will be input C. Apply a series of long pulses to it from the generator.

How does the D trigger behave? The front of the first input pulse switches it to a single state, and the front of the second - to zero, the front of the third - again to a single one, etc. Therefore, in this mode of operation, each input pulse changes the logical state of the trigger to the opposite. As a result, the frequency of the pulses at each output of the trigger turns out to be half the frequency of the input ones.

Based on the experience, construct graphs illustrating the operation of the D-flip-flop in this mode. They should be the same as shown in Fig. 3b.

D-trigger
Rice. 3 D trigger in counting mode

The conclusion suggests itself - in this mode, the D-flip-flop divides the frequency of the input signal by 2, that is, it performs the function of a binary counter.

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