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96-layer 3D TLC NAND memory

02.07.2017

Toshiba Memory Corporation announced the creation of a prototype 96-layer BiCS FLASH flash memory chip with a three-dimensional layout. Each cell of this memory stores three bits of information. Evaluation samples of 96-layer 3D TLC NAND flash memory chips with a density of 256 Gb should appear in the second half of the year, and the manufacturer expects to start serial production in 2018.

The new memory is suitable for consumer and enterprise SSDs, smartphones, tablets and memory cards.

The manufacturer plans to release 96-layer microcircuits with a density of 512 Gbit and the introduction of QLC technology, which allows storing four bits in each cell.

Compared to 64-layer BiCS FLASH memory, the specific storage density is increased by 40%. This allows more memory to be made from a single wafer and lower cost per bit.

The release of 96-layer BiCS FLASH memory is planned to be mastered at the Fab 5 factory, the Fab 2 factory opened about a year ago, and at the Fab 6 factory, which should start operating next summer.

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