ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING Key synchronous detector. Encyclopedia of radio electronics and electrical engineering Encyclopedia of radio electronics and electrical engineering / Radio amateur designer The principle of operation of the key synchronous detector is illustrated in Fig. one.
The device has a differential input. Two equal detected signals are fed in antiphase to a high-speed electronic switch. For simplicity, in Fig. 1 switch is shown as mechanical. We will assume that it is ideal, i.e., switching occurs instantly and its resistance in the closed state is zero. The operation of the switch is controlled by a signal, commonly referred to as a reference. Let the reference signal control the operation of the switch so that its moving contact is always connected to the input that currently has a positive voltage. This is possible if the reference signal is synchronized with the one being detected, which is why this detector is called synchronous. For definiteness, it is useful to introduce the concept of the phase shift angle j between the detected and the reference signal, in this case j = 0. At the output of the switch, we obtain a signal that coincides in shape with a full-wave rectified signal. Further, this signal passes through an integrating RC circuit, which smooths out the ripple of the rectified voltage. At the output of the chain, the voltage will be equal to 2 / PI * Uc. Rectification occurred without the participation of non-linear elements. Here we find the first remarkable property of a synchronous detector - the ability to detect linearly at any amplitude of the detected signal. This makes it extremely attractive for numerous applications. Unfortunately, it is not always possible to implement a synchronous reference signal. If the phase of the reference signal is changed by 180°, then the output voltage will change polarity, since the switch will only pass the negative half-waves of the input voltage. If the phase shift is equal to 90°, then the switch will pass both positive and negative half-waves, as can be seen in Fig. 1. At the output of the integrating chain, the signal will be zero. An analysis of the device circuit with an arbitrary phase shift leads to the conclusion that the signal at the output of the integrating circuit in this case is equal to 2/PI*Uccos(f). The second remarkable property of a synchronous detector is its phase properties. It can work as a phase detector. Let us consider one of the applications of such a phase detector. If, in addition to this synchronous detector, which outputs a signal of 2/PI*Uccos(f) at the output, one more such detector is used, the phase of the reference signal of which is additionally shifted by 90°, then the signal at the output of this additional detector will be equal to 2/PI*Ucsin(f). As a result, it becomes possible to separate the active and reactive components of the signal. Next, consider the operation of a synchronous detector in an asynchronous mode. Let Fc be the frequency of the detected signal, F0 the frequency of the reference signal, then the phase shift between these signals will be equal to j = (Fc - F0)t. As a result, the output of the synchronous detector is not a constant, but an alternating voltage of the difference frequency. However, this voltage is obtained at the output of the integrating RC circuit, which reduces the magnitude of the voltage amplitude with increasing difference frequency. The total value of the voltage at the output of the synchronous detector is determined by the expression The frequency dependence of the amplitude of this signal is the same as that of a conventional oscillatory circuit with a quality factor Q = F0RC, a bandwidth df = 1/(PI*RC) and a resonant frequency F0. However, there is a significant qualitative difference. When we are dealing with an oscillatory circuit, the frequency at its output is always equal to the frequency of the applied signal. For a synchronous detector, the frequency of the output signal is equal to the difference between the frequencies of the reference signal and the one being detected. The oscillatory circuit has a single resonant frequency, while the synchronous detector exhibits resonant maxima at all odd harmonics of the reference signal frequency. On fig. Figure 2 shows the frequency response of a synchronous detector with a quality factor of 100. Resonances are observed at zero frequency, the frequency coinciding with the frequency of the reference signal, triple the frequency, and at all further odd harmonics of the reference signal. The third remarkable property of a synchronous detector is its frequency-selective characteristics.
If the synchronous detector operates in synchronous mode and detects a modulated signal, its frequency-selective properties are exhibited for the detected signal. The bandwidth of the synchronous detector for the detected signal is halved: df = 1/(2*PI*RC) The quality factor and bandwidth of a synchronous detector are extremely easy to change by choosing the parameters of the RC chain. You can get both very low quality factor and wide bandwidth, and extremely high quality factor and narrow bandwidth. For example, at a frequency of 1 MHz with a resistance of 1 MΩ and a capacitance of 1 μF, we get a quality factor of 6,28 * 106 and a bandwidth of 0,3 Hz. Such a quality factor cannot be obtained even with a good quartz resonator. Meanwhile, a bandwidth of even 0,001 Hz is achievable. However, such an exotic bandwidth may be required only when measuring extremely weak signals.
The frequency-selective properties of a synchronous detector can be significantly improved by using a higher-order low-pass filter instead of an integrating RC circuit. So, with a second-order filter, you can get the same frequency response as when using a filter with two coupled circuits for frequency selection. A fourth order filter will give the same effect as a lumped selection filter with four loops. On fig. 3 shows an example of a second-order active filter circuit that can be used instead of an RC integrating network. The bandwidth of such a filter is df=1/(2*PI/RC) The synchronous detector is most often used in synchronous mode. To do this, it is necessary to have a synchronous reference signal. If the detector is part of some closed measuring complex, then there is usually no problem with creating a synchronous reference signal. Difficulties arise when detecting signals that come from outside, for example, radio signals. In television, the selected carrier frequency of the image signal is used as a reference. For broadcast reception, the reference signal can be arranged using a PLL. To solve this problem, specialized integrated circuits are produced. In asynchronous mode, the output is a difference frequency signal. If this is not desirable, then you can proceed as follows. It is necessary to use two synchronous detectors, the reference signals of which are shifted by 90°. The signals obtained at the outputs of these detectors must be squared and added. Then take the square root of the resulting sum. The result is a signal that does not contain a difference frequency: It is easy to implement the classic synchronous detector circuit using two analog switches (Fig. 4).
Such a detector can operate at frequencies up to 1 MHz. Together with the shapers of the input and reference signals, the device turns out to be somewhat cumbersome. Therefore, sometimes you can give preference to a simpler option according to the scheme in Fig. 5.
Such a detector works as follows. Assume that the switch is open for negative inputs and closed for positive ones. When the switch is open, we have an inverting amplifier with a gain of -1, and the negative input voltage at the output of the op-amp becomes positive. If the key is closed, then the device acquires the property of a repeater. As a result, a full-wave rectified signal is obtained at the output of the operational amplifier. At other phases of the key operation, we obtain all the same output signals as in the classical key synchronous detector. This option has a much lower speed compared to the previous one, it can be used at a frequency of up to 10 kHz. The fastest key synchronous detector can be obtained on the basis of a signal multiplier. Its principle of operation is simple. If the detected and the reference signal have the same sign, then after multiplication we obtain a positive signal that retains the shape of the detected signal. The industry produces a lot of varieties of signal multipliers. Only some of them have the ability to multiply analog signals (for example, K525PS2), and on their basis it is possible to create a circuit of a key synchronous detector with the properties of a classical one. Most of the signal multipliers are used for their intended purpose as frequency converters in radio receiving equipment (often referred to there as a "double balanced mixer"). They can also be used as a synchronous detector, however, the output signal is differential, with the addition of some constant component, which may later need to be removed. A diagram of a possible variant of a synchronous detector is shown in Fig. . 6.
The detector operates up to a frequency of 1 MHz. At higher frequencies, difficulties arise with the formation of a rectangular reference signal, which should have an amplitude of about 1 V. The trimmer resistor, in the absence of a detected signal, sets zero voltage at the output. The disadvantage of the device is the dependence of the output voltage on the amplitude of the reference. This detector works as a synchronous and with a sinusoidal reference signal up to frequencies of several hundred megahertz, but it will no longer be a key synchronous detector, but a synchronous detector on a multiplier. Indeed, when multiplying signals Uccos(Ft + f) and Uccos(Ft) we get 1/2*U0Uc[cos(f)+cos(2Ft+f)] The second doubled frequency signal is suppressed by the integrating circuit at the output of the detector, leaving 1/2U0Uccos(f). Qualitatively the same result as in the key synchronous detector, but now there is a dependence on the value of the reference signal, which is not very good for measuring circuits. Literature:
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