Sinusoidal signal synthesizer. Scheme, description

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ENCYCLOPEDIA OF RADIO ELECTRONICS AND ELECTRICAL ENGINEERING
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Sinusoidal signal synthesizer. Encyclopedia of radio electronics and electrical engineering

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Encyclopedia of radio electronics and electrical engineering / Radio amateur designer

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The scheme shown in fig. 1 is capable of synthesizing a sinusoidal voltage with a frequency of 0,01 Hz to 1 MHz.

Sine Wave Synthesizer
Rice. 1. CD4040 - analog 561IE20, CD4030 - analog 561LP2, OP77 - analog K140UD17

A clock signal is applied to the input of binary counter IC1 with a frequency 32 times greater than the frequency of the sinusoid at the output of the device; summed at the input of op-amp IC0.

When the Q4 output of binary counter IC1 is logic low, the logic elements of IC2 operate as repeaters, but when the output of Q4 is set high, then the logic elements of IC2 operate as inverters. This level changes every 32 input clocks (or every 16 clocks at the Q0 output of IC1). Thus, at a low logic level at the output of Q4 of IC1, one period of the sinusoid (decreasing) is formed, at a high logic level, the second period (ascending), the entire sinusoid consists of 2 * 24 = 32 steps.

Since the sinusoidal signal at the output of the circuit has a stepped shape, to give the signal a traditional look, it should be integrated, which can be done by connecting a capacitor in parallel with resistor R5. The value of the capacitance of the capacitor depends on the operating frequency and is determined by the formula

C=1/(16*Fout*R5),

where C is the capacitance of the integrating capacitor, microfarads; Fout - the frequency of the sinusoid at the output of the operational amplifier IC3, Hz; R5 is the resistance of the resistor R5 in ohms (2200).

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Comments on the article:

Vladimir
I looked at the resistor values - it looks like they are from the E12 logarithmic series - every 5th, so instead of 150 there will be 180, and then if you make a more bit sinusoid 470, 1M5, 3M9 with the addition of 3 more XOR elements. [;)]

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